Maurizio Tranchero

Orcid: 0000-0003-4308-6150

According to our database1, Maurizio Tranchero authored at least 11 papers between 2007 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Measurement of PCB-Related Commutation-Loop Inductance Using a Vector Network Analyzer.
Proceedings of the 14th International Workshop on the Electromagnetic Compatibility of Integrated Circuits, 2024

2021
Thermal Parameter and State Estimation for Digital Twins of E-Powertrain Components.
IEEE Access, 2021

2011
Design of a University Nano-Satellite: the PiCPoT Case.
IEEE Trans. Aerosp. Electron. Syst., 2011

2010
Hy-Sim: model based hybrid simulation framework for WSN application development.
Proceedings of the 3rd International Conference on Simulation Tools and Techniques, 2010

2009
Generating interacting synchronous and asynchronous designs from simulink descriptions.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

A multi-level simulation approach in a Simulink-based design tool for FPGAs.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

Exploiting synchronous placement for asynchronous circuits onto commercial FPGAs.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

An Automatic Approach to Generate Haste Code from Simulink Specifications.
Proceedings of the 15th IEEE Symposium on Asynchronous Circuits and Systems, 2009

2008
Implementation of Self-Timed Circuits onto FPGAs Using Commercial Tools.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

2007
Automatic Generation of VHDL Code for Self-Timed Circuits from Simulink Specifications.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

Architecture of a Small Low-Cost Satellite.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007


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