Maurizio Gaibotti
According to our database1,
Maurizio Gaibotti
authored at least 5 papers
between 2001 and 2008.
Collaborative distances:
Collaborative distances:
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Bibliography
2008
A 65 nm 1 Gb 2b/cell NOR Flash With 2.25 MB/s Program Throughput and 400 MB/s DDR Interface.
IEEE J. Solid State Circuits, 2008
2007
A 65nm 1Gb 2b/Cell NOR Flash with 2.25MB/s Program Throughput and 400MB/s DDR interface.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
2005
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005
2002
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002
2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001