Mauricio Varea

According to our database1, Mauricio Varea authored at least 10 papers between 2001 and 2008.

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Bibliography

2008
Efficient and flexible access control via Jones-optimal logic program specialisation.
High. Order Symb. Comput., 2008

2006
Dual Flow Nets: Modeling the control/data-flow relation in embedded systems.
ACM Trans. Embed. Comput. Syst., 2006

Separation of Control and Data Flow in High-Level Petri Nets: Transforming Dual Flow Nets into Object Petri Nets.
Fundam. Informaticae, 2006

The Ecce and Logen partial evaluators and their web interfaces.
Proceedings of the 2006 ACM SIGPLAN Workshop on Partial Evaluation and Semantics-based Program Manipulation, 2006

2005
Recent Advances in Verification, Equivalence Checking and SAT-Solvers.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

2004
Towards context-aware testing for semantic interoperability on PvC environments.
Proceedings of the IEEE International Conference on Systems, 2004

Efficient and flexible access control via logic program specialisation.
Proceedings of the 2004 ACM SIGPLAN Workshop on Partial Evaluation and Semantics-based Program Manipulation, 2004

2003
Modelling and verification of embedded systems based on Petri net oriented representations.
PhD thesis, 2003

2002
Symbolic model checking of Dual Transition Petri Nets.
Proceedings of the Tenth International Symposium on Hardware/Software Codesign, 2002

2001
Dual transitions petri net based modelling technique for embedded systems specification.
Proceedings of the Conference on Design, Automation and Test in Europe, 2001


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