Matthieu Moy
Orcid: 0000-0002-6054-8882
According to our database1,
Matthieu Moy
authored at least 41 papers
between 2005 and 2024.
Collaborative distances:
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Bibliography
2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
2021
Standard-compliant parallel SystemC simulation of loosely-timed transaction level models: From baremetal to Linux-based applications support.
Integr., 2021
Proceedings of the 29th International Symposium on Modeling, 2021
Proceedings of the Fundamentals of Software Engineering - 9th International Conference, 2021
2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Standard-compliant Parallel SystemC simulation of Loosely-Timed Transaction Level Models.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020
2019
Response time analysis of dataflow applications on a many-core processor with shared-memory and network-on-chip.
Proceedings of the 27th International Conference on Real-Time Networks and Systems, 2019
2018
Estimating the Impact of Architectural and Software Design Choices on Dynamic Allocation of Heterogeneous Memories.
Proceedings of the 2018 International Symposium on Rapid System Prototyping, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2016
Leibniz Trans. Embed. Syst., 2016
Proceedings of the 24th International Conference on Real-Time Networks and Systems, 2016
2015
Proceedings of the 23rd International Conference on Real Time Networks and Systems, 2015
Proceedings of the 2015 International Symposium on Rapid System Prototyping, 2015
2014
Tech. Sci. Informatiques, 2014
Modélisation à haut niveau d'abstraction pour les systèmes embarqués. (High-level Models for Embedded Systems).
, 2014
2013
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013
Parallel programming with SystemC for loosely timed models: a non-intrusive approach.
Proceedings of the Design, Automation and Test in Europe, 2013
Fast and accurate TLM simulations using temporal decoupling for FIFO-based communications.
Proceedings of the Design, Automation and Test in Europe, 2013
System-level modeling of energy in TLM for early validation of power and thermal management.
Proceedings of the Design, Automation and Test in Europe, 2013
2012
Proceedings of the Third Workshop on Tools for Automatic Program Analysis, 2012
Succinct Representations for Abstract Interpretation - Combined Analysis Algorithms and Experimental Evaluation.
Proceedings of the Static Analysis - 19th International Symposium, 2012
2011
Proceedings of the 9th IEEE/ACM International Conference on Formal Methods and Models for Codesign, 2011
Proceedings of the 16th Annual SIGCSE Conference on Innovation and Technology in Computer Science Education, 2011
jTLM: An experimentation framework for the simulation of transaction-level models of Systems-on-Chip.
Proceedings of the Design, Automation and Test in Europe, 2011
2010
Performance Evaluation of Components Using a Granularity-based Interface Between Real-Time Calculus and Timed Automata
Proceedings of the Proceedings Eighth Workshop on Quantitative Aspects of Programming Languages, 2010
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2010
A Theoretical and Experimental Review of SystemC Front-ends.
Proceedings of the 2010 Forum on specification & Design Languages, 2010
Proceedings of the 10th International conference on Embedded software, 2010
ac2lus: Bringing SMT-Solving and Abstract Interpretation Techniques to Real-Time Calculus through the Synchronous Language Lustre.
Proceedings of the 22nd Euromicro Conference on Real-Time Systems, 2010
2009
Automatic translation of C/C++ parallel code into synchronous formalism using an SSA intermediate form.
Electron. Commun. Eur. Assoc. Softw. Sci. Technol., 2009
2007
Proceedings of the Model Checking Software, 2007
2006
Automatic Generation of Schedulings for Improving the Test Coverage of Systems-on-a-Chip.
Proceedings of the Formal Methods in Computer-Aided Design, 6th International Conference, 2006
2005
Techniques and Tools for the Verification of Systems-on-a-Chip at the Transaction Level. (Techniques et outils pour la vérification de Systèmes-sur-Puce au niveau transaction).
PhD thesis, 2005
Des. Autom. Embed. Syst., 2005
Proceedings of the EMSOFT 2005, 2005
Proceedings of the Fifth International Conference on Application of Concurrency to System Design (ACSD 2005), 2005