Matthias Stammler

Orcid: 0009-0006-8843-1076

According to our database1, Matthias Stammler authored at least 10 papers between 2023 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
RVVe: A Minimal RISC-V Vector Processor for Embedded AI Acceleration.
Proceedings of the 37th IEEE International System-on-Chip Conference, 2024

ICE TEA: Insertion of Custom Early Exits for Time-, Energy- & Anomaly-Aware Neural Networks.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

Automated Polyhedron-based TDMA Schedule Design for Predictable Mixed-Criticality MPSoCs.
Proceedings of the 27th Euromicro Conference on Digital System Design, 2024

BayWatch: Leveraging Bayesian Neural Networks for Hardware Fault Tolerance and Monitoring.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2024

UNCOVER: Data-Driven Design Support through Continuous Monitoring of Security Incidents.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024


2023
Multilevel Security Model for Secure Information Flow Inside Software Components Employing Automated Code Generation.
Proceedings of the 12th Mediterranean Conference on Embedded Computing, 2023

Context-Aware Layer Scheduling for Seamless Neural Network Inference in Cloud-Edge Systems.
Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023

EFFECT: An End-to-End Framework for Evaluating Strategies for Parallel AI Anomaly Detection.
Proceedings of the International Neural Network Society Workshop on Deep Learning Innovations and Applications, 2023

Mitigating Masking in Automotive Communication Systems: Modeling and Hardware Generation.
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023


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