Matthias Norbert Balzer
According to our database1,
Matthias Norbert Balzer
authored at least 17 papers
between 2001 and 2018.
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Bibliography
2018
A Content - Adapted FPGA Memory Architecture with Pattern Recognition Capability and Interval Compressing Technique.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018
2017
Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017
Inspiration from VR Gaming Technology: Deep Immersion and Realistic Interaction for Scientific Visualization.
Proceedings of the 12th International Joint Conference on Computer Vision, Imaging and Computer Graphics Theory and Applications (VISIGRAPP 2017) - Volume 3: IVAPP, Porto, Portugal, February 27, 2017
A novel FPGA-based track reconstruction approach for the level-1 trigger of the CMS experiment at CERN.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017
2016
A Content Adapted FPGA Memory Architecture with Pattern Recognition Capability for L1 Track Triggering in the LHC Environment.
Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016
2014
ACM Trans. Reconfigurable Technol. Syst., 2014
A comprehensive comparison of GPU- and FPGA-based acceleration of reflection image reconstruction for 3D ultrasound computer tomography.
J. Real Time Image Process., 2014
Evaluation of performance and architectural efficiency of FPGAs and GPUs in the 40 and 28 nm generations for algorithms in 3D ultrasound computer tomography.
Comput. Electr. Eng., 2014
2012
RIVER architecture: Reconfigurable flow and fabric for parallel stream processing on FPGAs.
Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012
Comparison of processing performance and architectural efficiency metrics for FPGAs and GPUs in 3D Ultrasound Computer Tomography.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012
RIVER: Reconfigurable Pre-Synthesized-Streaming Architecture for Signal Processing on FPGAs.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012
2011
ALPS: A Methodology for Application-Level Communication Characterization of Parsec 2.1.
Proceedings of the International Conference on Computational Science, 2011
Int. J. Reconfigurable Comput., 2011
Acceleration of image reconstruction in 3D ultrasound computer tomography: An evaluation of CPU, GPU and FPGA computing.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011
2010
First Evaluation of FPGA Reconfiguration for 3D Ultrasound Computer Tomography.
Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip, 2010
2005
DSP-FPGA multiprocessor system with CAN, PPI, and ethernet interfaces.
Proceedings of the Third IASTED International Conference on Circuits, 2005
2001
Proceedings of the Sixth International Symposium on Signal Processing and its Applications, 2001