Matthias Korb
According to our database1,
Matthias Korb
authored at least 22 papers
between 2006 and 2024.
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Bibliography
2024
IEEE Access, 2024
Proceedings of the 32nd IFIP/IEEE International Conference on Very Large Scale Integration, 2024
Proceedings of the IEEE International Mediterranean Conference on Communications and Networking, 2024
Turbo Receiver for Short-Block-Length Polar-Coded Direct-Access Satellite-IoT Systems.
Proceedings of the IEEE International Mediterranean Conference on Communications and Networking, 2024
2023
Optimum Access-Point Constellation for Indoor Time Difference of Arrival Positioning.
Proceedings of the IEEE/ION Position, Location and Navigation Symposium, 2023
2021
Near-channel classifier: symbiotic communication and classification in high-dimensional space.
Brain Informatics, 2021
2020
Proceedings of the IEEE/ION Position, Location and Navigation Symposium, 2020
A Cellular-Modem-Hosted Low-Cost Single-Shot Dual-Mode Assisted-GNSS Receiver for the Internet of Things.
Proceedings of the IEEE/ION Position, Location and Navigation Symposium, 2020
2019
IEEE Trans. Instrum. Meas., 2019
2018
Proceedings of the 2018 IEEE Wireless Communications and Networking Conference, 2018
Proceedings of the 2018 IEEE Sensors Applications Symposium, 2018
A Dual-Mode NB-IoT and EC-GSM RF-SoC Achieving -128-dBm Extended-Coverage and Supporting OTDOA and A-GPS Positioning.
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018
2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
Proceedings of the 2017 IEEE Wireless Communications and Networking Conference Workshops, 2017
A SAW-less RF-SoC for cellular IoT supporting EC-GSM-IoT -121.7 dBm sensitivity through EGPRS2A 592 kbps throughput.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017
2016
Proceedings of the 23rd International Conference on Telecommunications, 2016
2014
Numerical free-disposal-hull data-envelopment analysis of potential CMOS-successor technologies.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014
2012
A quantitative analysis of fixed-point LDPC-decoder implementations using hardware-accelerated HDL emulations.
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012
2011
Proceedings of the 37th European Solid-State Circuits Conference, 2011
2010
LDPC decoder area, timing, and energy models for early quantitative hardware cost estimates.
Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010
2009
Proceedings of the 35th European Solid-State Circuits Conference, 2009
2006
Modelling and Quantitative Analysis of Coupling Mechanisms of Programmable Processor Cores and Arithmetic Oriented eFPGA Macros.
Proceedings of the 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, 2006