Matthias Kamuf

According to our database1, Matthias Kamuf authored at least 13 papers between 2003 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Assessing IMD of a Direct-to-RF Platform.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

2011
Successive interference cancellation techniques for LTE downlink.
Proceedings of the IEEE 22nd International Symposium on Personal, 2011

2010
Design and measurement of a variable-rate Viterbi decoder in 130-nm digital CMOS.
Microprocess. Microsystems, 2010

Modification of SOVA-Based Algorithms for Efficient Hardware Implementation.
Proceedings of the 71st IEEE Vehicular Technology Conference, 2010

2008
Optimization and Implementation of a Viterbi Decoder Under Flexibility Constraints.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008

2007
Trellis Decoding: From Algorithm to Flexible Architectures.
PhD thesis, 2007

Survivor Path Processing in Viterbi Decoders Using Register Exchange and Traceforward.
IEEE Trans. Circuits Syst. II Express Briefs, 2007

2005
Architectural considerations for rate-flexible trellis processing blocks.
Proceedings of the IEEE 16th International Symposium on Personal, 2005

A Manual on ASIC Front to Back End Design Flow.
Proceedings of the 2005 International Conference on Microelectronics Systems Education, 2005

Teaching Digital ASIC Design to Students with Heterogeneous Previous Knowledge.
Proceedings of the 2005 International Conference on Microelectronics Systems Education, 2005

Area and power efficient trellis computational blocks in 0.13µm CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
A simplified computational kernel for trellis-based decoding.
IEEE Commun. Lett., 2004

2003
Providing flexibility in a convolutional encoder.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003


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