Matteo Monchiero

According to our database, Matteo Monchiero authored at least 33 papers between 2004 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

RETROSPECTIVE: Corona: System Implications of Emerging Nanophotonic Technology.

Dana Vantrease, Robert Schreiber, Matteo Monchiero, Moray McLaren, Norman P. Jouppi, Marco Fiorentino, Al Davis, Nathan L. Binkert, Raymond G. Beausoleil, Jung Ho Ahn

CoRR, 2023

2013

Capturing vulnerability variations for register files.

Javier Carretero, Enric Herrero, Matteo Monchiero, Tanausú Ramírez, Xavier Vera

Proceedings of the Design, Automation and Test in Europe, 2013

2011

Hardware/software-based diagnosis of load-store queues using expandable activity logs.

Javier Carretero, Xavier Vera, Jaume Abella, Tanausú Ramírez, Matteo Monchiero, Antonio González

Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011

Ally: OS-Transparent Packet Inspection Using Sequestered Cores.

Jen-Cheng Huang, Matteo Monchiero, Yoshio Turner, Hsien-Hsin S. Lee

Proceedings of the 2011 ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), 2011

CMOS Nanophotonics: Technology, System Implications, and a CMP Case Study.

Jung Ho Ahn, Raymond G. Beausoleil, Nathan L. Binkert, Al Davis, Marco Fiorentino, Norman P. Jouppi, Moray McLaren, Matteo Monchiero, Naveen Muralimanohar, Robert Schreiber, Dana Vantrease

Proceedings of the Low Power Networks-on-Chip., 2011

2009

COTSon: infrastructure for full system simulation.

Eduardo Argollo, Ayose Falcón, Paolo Faraboschi, Matteo Monchiero, Daniel Ortega

ACM SIGOPS Oper. Syst. Rev., 2009

How to simulate 1000 cores.

Matteo Monchiero, Jung Ho Ahn, Ayose Falcón, Daniel Ortega, Paolo Faraboschi

SIGARCH Comput. Archit. News, 2009

Power Management of Datacenter Workloads Using Per-Core Power Gating.

Jacob Leverich, Matteo Monchiero, Vanish Talwar, Parthasarathy Ranganathan, Christos Kozyrakis

IEEE Comput. Archit. Lett., 2009

A multiprocessor self-reconfigurable JPEG2000 encoder.

Antonino Tumeo, Simone Borgio, Davide Bosisio, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto

Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

Using Coherence Information and Decay Techniques to Optimize L2 Cache Leakage in CMPs.

Matteo Monchiero, Ramon Canal, Antonio González

Proceedings of the ICPP 2009, 2009

Prototyping pipelined applications on a heterogeneous FPGA multiprocessor virtual platform.

Antonino Tumeo, Marco Branca, Lorenzo Camerini, Marco Ceriani, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto

Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008

Power/Performance/Thermal Design-Space Exploration for Multicore Architectures.

Matteo Monchiero, Ramon Canal, Antonio González

IEEE Trans. Parallel Distributed Syst., 2008

Corona: System Implications of Emerging Nanophotonic Technology.

Dana Vantrease, Robert Schreiber, Matteo Monchiero, Moray McLaren, Norman P. Jouppi, Marco Fiorentino, Al Davis, Nathan L. Binkert, Raymond G. Beausoleil, Jung Ho Ahn

Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008

A Comprehensive Memory Modeling Tool and Its Application to the Design and Analysis of Future Memory Hierarchies.

Shyamkumar Thoziyoor, Jung Ho Ahn, Matteo Monchiero, Jay B. Brockman, Norman P. Jouppi

Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008

A Modular Approach to Model Heterogeneous MPSoC at Cycle Level.

Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa

Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

A Dual-Priority Real-Time Multiprocessor System on FPGA for Automotive Applications.

Antonino Tumeo, Marco Branca, Lorenzo Camerini, Marco Ceriani, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto

Proceedings of the Design, Automation and Test in Europe, 2008

Lightweight DMA management mechanisms for multiprocessors on FPGA.

Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto

Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008

2007

Exploration of distributed shared memory architectures for NoC-based multiprocessors.

Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa

J. Syst. Archit., 2007

An Interrupt Controller for FPGA-based Multiprocessors.

Antonino Tumeo, Marco Branca, Lorenzo Camerini, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto

Proceedings of the 2007 International Conference on Embedded Computer Systems: Architectures, 2007

An Internal Partial Dynamic Reconfiguration Implementation of the JPEG Encoder for Low-Cost FPGAsb.

Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto

Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007

A Pipelined Fast 2D-DCT Accelerator for FPGA-based SoCs.

Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto

Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007

A design kit for a fully working shared memory multiprocessor on FPGA.

Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto

Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

A Self-Reconfigurable Implementation of the JPEG Encoder.

Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto

Proceedings of the IEEE International Conference on Application-Specific Systems, 2007

2006

Efficient Synchronization for Embedded On-Chip Multiprocessors.

Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa

IEEE Trans. Very Large Scale Integr. Syst., 2006

An efficient synchronization technique for multiprocessor systems on-chip.

Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa

SIGARCH Comput. Archit. News, 2006

Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA.

Simone Borgio, Davide Bosisio, Fabrizio Ferrandi, Matteo Monchiero, Marco D. Santambrogio, Donatella Sciuto, Antonino Tumeo

Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, 2006

Design space exploration for multicore architectures: a power/performance/thermal view.

Matteo Monchiero, Ramon Canal, Antonio González

Proceedings of the 20th Annual International Conference on Supercomputing, 2006

Power/performance hardware optimization for synchronization intensive applications in MPSoCs.

Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005

Low-power branch prediction techniques for VLIW architectures: a compiler-hints based approach.

Matteo Monchiero, Gianluca Palermo, Mariagiovanna Sami, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon

Integr., 2005

AES Power Attack Based on Induced Cache Miss and Countermeasure.

Guido Bertoni, Vittorio Zaccaria, Luca Breveglieri, Matteo Monchiero, Gianluca Palermo

Proceedings of the International Symposium on Information Technology: Coding and Computing (ITCC 2005), 2005

The Combined Perceptron Branch Predictor.

Matteo Monchiero, Gianluca Palermo

Proceedings of the Euro-Par 2005, Parallel Processing, 11th International Euro-Par Conference, Lisbon, Portugal, August 30, 2005

Fast Dynamic Memory Integration in Co-Simulation Frameworks for Multiprocessor System on-Chip.

Oreste Villa, Patrick Schaumont, Ingrid Verbauwhede, Matteo Monchiero, Gianluca Palermo

Proceedings of the 2005 Design, 2005

2004

Power-aware branch prediction techniques: a compiler-hints based approach for VLIW processors.

Matteo Monchiero, Gianluca Palermo, Mariagiovanna Sami, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon

Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004