Matin Hashemi
Orcid: 0000-0003-4090-6678
According to our database1,
Matin Hashemi
authored at least 30 papers
between 2007 and 2023.
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Online presence:
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on orcid.org
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Bibliography
2023
ParaLiNGAM: Parallel causal structure learning for linear non-Gaussian acyclic models.
J. Parallel Distributed Comput., June, 2023
2022
Accurate modulation classification under impaired wireless channels via shallow convolutional neural networks.
Phys. Commun., 2022
Neural Networks, 2022
2021
Deep-Learning-Based Blind Recognition of Channel Code Parameters Over Candidate Sets Under AWGN and Multi-Path Fading Conditions.
IEEE Wirel. Commun. Lett., 2021
IEEE Trans. Parallel Distributed Syst., 2021
2020
IEEE Trans. Parallel Distributed Syst., 2020
LSTM-Based ECG Classification for Continuous Monitoring on Personal Wearable Devices.
IEEE J. Biomed. Health Informatics, 2020
High-Throughput and Memory-Efficient Parallel Viterbi Decoder for Convolutional Codes on GPU.
CoRR, 2020
2019
A Matrix-Inversion Technique for FPGA-Based Real-Time EMT Simulation of Power Converters.
IEEE Trans. Ind. Electron., 2019
ECG Classification Algorithm Based on STDP and R-STDP Neural Networks for Real-Time Monitoring on Ultra Low-Power Personal Wearable Devices.
IEEE Trans. Biomed. Circuits Syst., 2019
Seedless Graph Matching via Tail of Degree Distribution for Correlated Erdos-Renyi Graphs.
CoRR, 2019
Ultra Low-Power and Real-time ECG Classification Based on STDP and R-STDP Neural Networks for Wearable Devices.
CoRR, 2019
2016
CNNdroid: GPU-Accelerated Execution of Trained Deep Convolutional Neural Networks on Android.
Proceedings of the 2016 ACM Conference on Multimedia Conference, 2016
2015
CoRR, 2015
Implementation-Aware Model Analysis: The Case of Buffer-Throughput Tradeoff in Streaming Applications.
Proceedings of the 16th ACM SIGPLAN/SIGBED Conference on Languages, 2015
2014
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
2013
Throughput-memory footprint trade-off in synthesis of streaming software on embedded multiprocessors.
ACM Trans. Embed. Comput. Syst., 2013
2012
ACM Trans. Design Autom. Electr. Syst., 2012
Proceedings of the SIGPLAN/SIGBED Conference on Languages, 2012
2011
Proceedings of the 2011 IEEE International Conference on Microelectronic Systems Education, 2011
Towards scalable utilization of embedded manycores in throughput-sensitive applications.
Proceedings of the 2011 IEEE International High Level Design Validation and Test Workshop, 2011
2010
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, 2010
2009
Throughput-driven synthesis of embedded software for pipelined execution on multicore architectures.
ACM Trans. Embed. Comput. Syst., 2009
2008
System-Level Performance Estimation for Application-Specific MPSoC Interconnect Synthesis.
Proceedings of the IEEE Symposium on Application Specific Processors, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
2007
Joint throughput and energy optimization for pipelined execution of embedded streaming applications.
Proceedings of the 2007 ACM SIGPLAN/SIGBED Conference on Languages, 2007