Mathieu Thevenin

Orcid: 0000-0002-9962-1135

According to our database1, Mathieu Thevenin authored at least 14 papers between 2009 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Graphene Detection System.
Proceedings of the 14th International Conference on Management of Digital EcoSystems, 2022

2021
Detection of Monolayer Graphene.
Proceedings of the Computational Collective Intelligence - 13th International Conference, 2021

2020
Peak correlation classifier (PCC) applied to FTIR spectra: a novel means of identifying toxic substances in mixtures.
IET Signal Process., 2020

2019
A templated programmable architecture for highly constrained embedded HD video processing.
J. Real Time Image Process., 2019

2018
High-Level Reliability Evaluation of Reconfiguration-Based Fault Tolerance Techniques.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

2017
Model-driven reliability evaluation for MPSoC design.
Proceedings of the 2017 Conference on Design and Architectures for Signal and Image Processing, 2017

2016
A Scalable Design Approach to Efficiently Map Applications on CGRAs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

2014
An automated design approach to map applications on CGRAs.
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014

Efficient application mapping on CGRAs based on backward simultaneous scheduling/binding and dynamic graph transformations.
Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014

2012
GAMPIX: A new generation of gamma camera.
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012

2011
The eISP low-power and tiny silicon footprint programmable video architecture.
J. Real Time Image Process., 2011

Designing processors using MAsS, a modular and lightweight instruction-level exploration tool.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

2010
Processeur vidéo programmable pour la téléphonie mobile eISP, une architecture de calcul très basse consommation à faible empreinte silicium pour le traitement vidéo HD.
Tech. Sci. Informatiques, 2010

2009
Conception et validation d'un processeur programmable de traitement du signal à faible consommation et à faible empreinte silicium : application à la vidéo HD sur téléphone mobile. (Design and Validation).
PhD thesis, 2009


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