Massimo Petricca

IEEE Trans. Emerg. Top. Comput., 2022

2015

Characterization of RNS multiply-add units for power efficient DSP.

[BibT_eX]

[DOI]

Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

2014

Automated generation of battery aging models from datasheets.

[BibT_eX]

[DOI]

Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

A cross-level verification methodology for digital IPs augmented with embedded timing monitors.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013

A fully standard-cell delay measurement circuit for timing variability detection.

[BibT_eX]

[DOI]

Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013

A framework with temperature-aware accuracy levels for battery modeling from datasheets.

[BibT_eX]

[DOI]

Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013

An automated framework for generating variable-accuracy battery models from datasheet information.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013

Computer-aided design of electrical energy systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

Truncated multipliers through power-gating for degrading precision arithmetic.

[BibT_eX]

[DOI]

Pietro Albicocco

Proceedings of the 2013 Asilomar Conference on Signals, 2013

2012

Power efficient design of parallel/serial FIR filters in RNS.

[BibT_eX]

[DOI]

Pietro Albicocco

Proceedings of the Conference Record of the Forty Sixth Asilomar Conference on Signals, 2012

Imprecise arithmetic for low power image processing.

[BibT_eX]

[DOI]

Pietro Albicocco