Massimo Bocchi

According to our database1, Massimo Bocchi authored at least 9 papers between 2003 and 2006.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2006
A reconfigurable multiprocessor SoC architectures.
PhD thesis, 2006

XiSystem: a XiRisc-based SoC with reconfigurable IO module.
IEEE J. Solid State Circuits, 2006

A case-study on multimedia applications for the XiRisc reconfigurable processor.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A stream register file unit for reconfigurable processors.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A Multi-Context Pipelined Array for Embedded Systems.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Design and implementation of a reconfigurable heterogeneous multiprocessor SoC.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005
A Cycle-Accurate ISS for a Dynamically Reconfigurable Processor Architecture.
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

2004
A XiRisc-based SoC for embedded DSP applications.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2003
A system level IP integration methodology for fast SOC design.
Proceedings of the 2003 International Symposium on System-on-Chip, 2003


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