Masoud Zabihi

Orcid: 0000-0003-1916-901X

According to our database1, Masoud Zabihi authored at least 29 papers between 2014 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
On Error Correction for Nonvolatile Processing-In-Memory.
Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024

SuperFlow: A Fully-Customized RTL-to-GDS Design Automation Flow for Adiabatic Quantum- Flux - Parametron Superconducting Circuits.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

On Gate Flip Errors in Computing-In-Memory.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

Late Breaking Result: AQFP-aware Binary Neural Network Architecture Search.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023
A Life-Cycle Energy and Inventory Analysis of Adiabatic Quantum-Flux-Parametron Circuits.
CoRR, 2023

SupeRBNN: Randomized Binary Neural Network Using Adiabatic Superconductor Josephson Devices.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

On Endurance of Processing in (Nonvolatile) Memory.
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

PimCity: A Compute in Memory Substrate featuring both Row and Column Parallel Computing.
Proceedings of the IEEE International Conference on Rebooting Computing, 2023

2022
Energy-efficient and Reliable Inference in Nonvolatile Memory under Extreme Operating Conditions.
ACM Trans. Embed. Comput. Syst., September, 2022

CRAM-Seq: Accelerating RNA-Seq Abundance Quantification Using Computational RAM.
IEEE Trans. Emerg. Top. Comput., 2022

Error Detection and Correction for Processing in Memory (PiM).
CoRR, 2022

2021
Spiking Neural Networks in Spintronic Computational RAM.
ACM Trans. Archit. Code Optim., 2021

Towards Homomorphic Inference Beyond the Edge.
CoRR, 2021

Exploring the Feasibility of Using 3D XPoint as an In-Memory Computing Accelerator.
CoRR, 2021

Seeds of SEED: H-CRAM: In-memory Homomorphic Search Accelerator using Spintronic Computational RAM.
Proceedings of the 2021 International Symposium on Secure and Private Execution Environment Design (SEED), 2021

BeGAN: Power Grid Benchmark Generation Using a Process-portable GAN-based Methodology.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

CAMeleon: Reconfigurable B(T)CAM in Computational RAM.
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

2020
PIMBALL: Binary Neural Networks in Spintronic Memory.
ACM Trans. Archit. Code Optim., 2020

An Inference and Learning Engine for Spiking Neural Networks in Computational RAM (CRAM).
CoRR, 2020

MOUSE: Inference In Non-volatile Memory for Energy Harvesting Applications.
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

CRAFFT: High Resolution FFT Accelerator In Spintronic Computational RAM.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
In-Memory Processing on the Spintronic CRAM: From Hardware Design to Application Mapping.
IEEE Trans. Computers, 2019

A Machine Learning Accelerator In-Memory for Energy Harvesting.
CoRR, 2019

Using Spin-Hall MTJs to Build an Energy-Efficient In-memory Computation Platform.
Proceedings of the 20th International Symposium on Quality Electronic Design, 2019

True In-memory Computing with the CRAM: From Technology to Applications.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

2018
Computational RAM to Accelerate String Matching at Scale.
CoRR, 2018

Exploiting Processing in Non-Volatile Memory for Binary Neural Network Accelerators.
CoRR, 2018

Efficient In-Memory Processing Using Spintronics.
IEEE Comput. Archit. Lett., 2018

2014
Comparison between optimal interconnection network in different 2D and 3D NoC structures.
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014


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