Masoud Pashaeifar

Orcid: 0000-0002-1113-7075

According to our database1, Masoud Pashaeifar authored at least 9 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
A Chain-Weaver Balanced Power Amplifier With an Embedded Impedance/Power Sensor.
IEEE J. Solid State Circuits, December, 2024

32.7 A 25.2dBm PSAT, 35-to-43GHz VSWR-Resilient Chain-Weaver Eight-Way Balanced PA with an Embedded Impedance/Power Sensor.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2022
A Millimeter-Wave CMOS Series-Doherty Power Amplifier With Post-Silicon Inter-Stage Passive Validation.
IEEE J. Solid State Circuits, 2022

2021
A Millimeter-Wave Mutual-Coupling-Resilient Double-Quadrature Transmitter for 5G Applications.
IEEE J. Solid State Circuits, 2021

A 24-to-30GHz Double-Quadrature Direct-Upconversion Transmitter with Mutual-Coupling-Resilient Series-Doherty Balanced PA for 5G MIMO Arrays.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

On-Chip Output Stage Design for a Continuous Class-F Power Amplifier.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A 24-to-32GHz series-Doherty PA with two-step impedance inverting power combiner achieving 20.4dBm Psat and 38%/34% PAE at Psat/6dB PBO for 5G applications.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021

2019
A Theoretical Framework for Quality Estimation and Optimization of DSP Applications Using Low-Power Approximate Adders.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2018
Approximate Reverse Carry Propagate Adder for Energy-Efficient DSP Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2018


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