Masayuki Mizuno

According to our database, Masayuki Mizuno authored at least 43 papers between 1996 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

The numerical analysis of mass evacuation in Taipei 101 with control volume model.

Guan-Yuan Wu, Masayuki Mizuno

Simul. Model. Pract. Theory, 2019

Formal Verifications of Call-by-Need and Call-by-Name Evaluations with Mutual Recursion.

Masayuki Mizuno, Eijiro Sumii

Proceedings of the Programming Languages and Systems - 17th Asian Symposium, 2019

2018

Formal Verification of the Correspondence Between Call-by-Need and Call-by-Name.

Masayuki Mizuno, Eijiro Sumii

Proceedings of the Functional and Logic Programming - 14th International Symposium, 2018

2013

A 5.5Gb/s 5mm contactless interface containing a 50Mb/s bidirectional sub-channel employing common-mode OOK signaling.

Ken'ichiro Hijioka, Masaharu Matsudaira, Koichi Yamaguchi, Masayuki Mizuno

Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012

A 2.5 kV Isolation 35 kV/us CMR 250 Mbps Digital Isolator in Standard CMOS With a Small Transformer Driving Technique.

Shunichi Kaeriyama, Shinichi Uchida, Masayuki Furumiya, Mitsuji Okada, Tadashi Maeda, Masayuki Mizuno

IEEE J. Solid State Circuits, 2012

A 27% Active-Power-Reduced 40-nm CMOS Multimedia SoC With Adaptive Voltage Scaling Using Distributed Universal Delay Lines.

Yoshifumi Ikenaga, Masahiro Nomura, Shuji Suenaga, Hideo Sonohara, Yoshitaka Horikoshi, Toshiyuki Saito, Yukio Ohdaira, Yoichiro Nishio, Tomohiro Iwashita, Miyuki Satou, Koji Nishida, Koichi Nose, Koichiro Noguchi, Yoshihiro Hayashi, Masayuki Mizuno

IEEE J. Solid State Circuits, 2012

A 280nW, 100kHz, 1-cycle start-up time, on-chip CMOS relaxation oscillator employing a feedforward period control scheme.

Takashi Tokairin, Koichi Nose, Koichi Takeda, Koichiro Noguchi, Tadashi Maeda, Kazuyoshi Kawai, Masayuki Mizuno

Proceedings of the Symposium on VLSI Circuits, 2012

2011

A Duobinary Signaling for Asymmetric Multi-Chip Communication.

Koichi Yamaguchi, Masayuki Mizuno

IEICE Trans. Electron., 2011

Dicode Partial Response Signaling over Inductively-Coupled Channel.

Koichi Yamaguchi, Masayuki Mizuno

IEICE Trans. Electron., 2011

A Clock Generator with Clock Period, Duty-Ratio and I/Q-Balance Adjustment Capabilities for On-Chip Timing-Margin Tests.

Shunichi Kaeriyama, Mikihiro Kajita, Masayuki Mizuno

IEICE Trans. Electron., 2011

2010

An Inductive-Coupling DC Voltage Transceiver for Highly Parallel Wafer-Level Testing.

Yoichi Yoshida, Koichi Nose, Yoshihiro Nakagawa, Koichiro Noguchi, Yasuhiro Morita, Masamoto Tago, Masayuki Mizuno, Tadahiro Kuroda

IEEE J. Solid State Circuits, 2010

A Chip-Stacked Memory for On-Chip SRAM-Rich SoCs and Processors.

Hideaki Saito, Masayuki Nakajima, Takumi Okamoto, Yusuke Yamada, Akira Ohuchi, Noriyuki Iguchi, Toshitsugu Sakamoto, Koichi Yamaguchi, Masayuki Mizuno

IEEE J. Solid State Circuits, 2010

A 0.2 mm ² , 27 Mbps 3 mW ADC/FFT-Less FDM BAN Receiver With Energy Exploitation Capability.

Haruya Ishizaki, Masayuki Mizuno

IEEE J. Solid State Circuits, 2010

Gate-oxide early-life failure identification using delay shifts.

Young Moon Kim, Tze Wee Chen, Yoshio Kameda, Masayuki Mizuno, Subhasish Mitra

Proceedings of the 28th IEEE VLSI Test Symposium, 2010

A 16Gb/s 1^st-Tap FFE and 3-Tap DFE in 90nm CMOS.

Hideyuki Sugita, Kazuhisa Sunaga, Koichi Yamaguchi, Masayuki Mizuno

Proceedings of the IEEE International Solid-State Circuits Conference, 2010

A precise-tracking NBTI-degradation monitor independent of NBTI recovery effect.

Eisuke Saneyoshi, Koichi Nose, Masayuki Mizuno

Proceedings of the IEEE International Solid-State Circuits Conference, 2010

A 6Gb/s receiver with discrete-time based channel filtering for wireline FDM communications.

Tsutomu Takeya, Kazuhisa Sunaga, Koichi Yamaguchi, Hideyuki Sugita, Yoichi Yoshida, Masayuki Mizuno, Tadahiro Kuroda

Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009

On-Chip Optical Interconnect.

Keishi Ohashi, Kenichi Nishi, Takanori Shimizu, Masafumi Nakada, Junichi Fujikata, Jun Ushida, Sunao Torii, Koichi Nose, Masayuki Mizuno, Hiroaki Yukawa, Masao Kinoshita, Nobuo Suzuki, Akiko Gomyo, Tsutomu Ishi, Daisuke Okamoto, Katsuya Furue, Toshihide Ueno, Tai Tsuchizawa, Toshifumi Watanabe, Koji Yamada, Seiichi Itabashi, Jun Akedo

Proc. IEEE, 2009

A 2.0 Gb/s Clock-Embedded Interface for Full-HD 10-Bit 120 Hz LCD Drivers With 1/5-Rate Noise-Tolerant Phase and Frequency Recovery.

Koichi Yamaguchi, Yoshihiko Hori, Keiichi Nakajima, Kazumasa Suzuki, Masayuki Mizuno, Hiroshi Hayama

IEEE J. Solid State Circuits, 2009

Introduction to the Special Issue on the 2008 Symposium on VLSI Circuits.

Katsu Nakamura, Masayuki Mizuno

IEEE J. Solid State Circuits, 2009

Wireless DC voltage transmission using inductive-coupling channelfor highly-parallel wafer-level testing.

Yoichi Yoshida, Koichi Nose, Yoshihiro Nakagawa, Koichiro Noguchi, Yasuhiro Morita, Masamoto Tago, Tadahiro Kuroda, Masayuki Mizuno

Proceedings of the IEEE International Solid-State Circuits Conference, 2009

A 2.0Gb/s clock-embedded interface for full-HD 10b 120Hz LCD drivers with 1/5-rate noise-tolerant phase and frequency recovery.

Koichi Yamaguchi, Yoshihiko Hori, Keiichi Nakajima, Kazumasa Suzuki, Masayuki Mizuno, Hiroshi Hayama

Proceedings of the IEEE International Solid-State Circuits Conference, 2009

Basis-motion torque composition approach: generation of feedforward inputs for control of multi-joint robots.

Masahiro Sekimoto, Sadao Kawamura, Tomoya Ishitsubo, Shinsuke Akizuki, Masayuki Mizuno

Proceedings of the 2009 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2009

2008

A 0.016 mm², 2.4 GHz RF Signal Quality Measurement Macro for RF Test and Diagnosis.

Koichi Nose, Masayuki Mizuno

IEEE J. Solid State Circuits, 2008

LSI On-Chip Optical Interconnection with Si Nano-Photonics.

Junichi Fujikata, Kenichi Nishi, Akiko Gomyo, Jun Ushida, Tsutomu Ishi, Hiroaki Yukawa, Daisuke Okamoto, Masafumi Nakada, Takanori Shimizu, Masao Kinoshita, Koichi Nose, Masayuki Mizuno, Tai Tsuchizawa, Toshifumi Watanabe, Koji Yamada, Seiichi Itabashi, Keishi Ohashi

IEICE Trans. Electron., 2008

2007

Daisy Chain Transmitter for Power Reduction in Inductive-Coupling CMOS Link.

Kiichi Niitsu, Noriyuki Miura, Mari Inoue, Yoshihiro Nakagawa, Masamoto Tago, Masayuki Mizuno, Takayasu Sakurai, Tadahiro Kuroda

IEICE Trans. Electron., 2007

Fine-Grain Redundant Logic Using Defect-Prediction Flip-Flops.

Toru Nakura, Koichi Nose, Masayuki Mizuno

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

A 1-to-2GHz 4-Phase On-Chip Clock Generator with Timing-Margin Test Capability.

Shunichi Kaeriyama, Mikihiro Kajita, Masayuki Mizuno

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

LAGS System Using Data/Instruction Grain Power Control.

Makoto Ikeda, Taku Sogabe, Ken Ishii, Masayuki Mizuno, Toru Nakura, Koichi Nose, Kunihiro Asada

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2006

A 1-ps Resolution Jitter-Measurement Macro Using Interpolated Jitter Oversampling.

Koichi Nose, Mikihiro Kajita, Masayuki Mizuno

IEEE J. Solid State Circuits, 2006

Solid-Electrolyte Nanometer Switch.

Naoki Banno, Toshitsugu Sakamoto, Noriyuki Iguchi, Hisao Kawaura, Shunichi Kaeriyama, Masayuki Mizuno, Kazuya Terabe, Tsuyoshi Hasegawa, Masakazu Aono

IEICE Trans. Electron., 2006

Optical interconnect technologies for high-speed VLSI chips using silicon nano-photonics.

Keishi Ohashi, Junichi Fujikata, Masafumi Nakada, Tsutomu Ishi, Kenichi Nishi, Hirohito Yamada, Muneo Fukaishi, Masayuki Mizuno, Koichi Nose, Ichiro Ogura, Yutaka Urino, Toshio Baba

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

A 1ps-Resolution Jitter-Measurement Macro Using Interpolated Jitter Oversampling.

Koichi Nose, Mikihiro Kajita, Masayuki Mizuno

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005

A 6.7-fF/μm² bias-independent gate capacitor (BIGCAP) with digital CMOS process and its application to the loop filter of a differential PLL.

Makoto Takamiya, Masayuki Mizuno

IEEE J. Solid State Circuits, 2005

A nonvolatile programmable solid-electrolyte nanometer switch.

Shunichi Kaeriyama, Toshitsugu Sakamoto, Hiroshi Sunamura, Masayuki Mizuno, Hisao Kawaura, Tsuyoshi Hasegawa, Kazuya Terabe, Tomonobu Nakayama, Masakazu Aono

IEEE J. Solid State Circuits, 2005

2004

Frequency-hopping vernier clock generators for multiple clock domain SoCs.

Hiroshi Kodama, Masayuki Mizuno, Koichi Nose, Akio Tanaka

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2003

A 0.13-μm CMOS 5-Gb/s 10-m 28AWG cable transceiver with no-feedback-loop continuous-time post-equalizer.

Yoshiharu Kudoh, Muneo Fukaishi, Masayuki Mizuno

IEEE J. Solid State Circuits, 2003

2001

A 0.10 μm CMOS, 1.2 V, 2 GHz phase-locked loop with gain compensation VCO.

Koichiro Minami, Muneo Fukaishi, Masayuki Mizuno, Hideaki Onishi, Kenji Noda, Kiyotaka Imai, Tadahiko Horiuchi, Hiroshi Yamaguchi, Takanori Sato, Kazuyuki Nakamura, Masakazu Yaniashina

Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

1999

A 2000-MOPS embedded RISC processor with a Rambus DRAM controller.

Kazumasa Suzuki, Masayuki Daito, Tomoo Inoue, Kouhei Nadehara, Masahiro Nomura, Masayuki Mizuno, Tomofumi Iima, Shoichiro Sato, Terumi Fukuda, Tomohisa Arai, Ichiro Kuroda, Masakazu Yamashina

IEEE J. Solid State Circuits, 1999

1997

A 1.5-W single-chip MPEG-2 MP@ML video encoder with low power motion estimation and clocking.

Masayuki Mizuno, Yasushi Ooi, Naoya Hayashi, Junichi Goto, Masatoshi Hozumi, Koichiro Furuta, Atsufumi Shibayama, Yoetsu Nakazawa, Osamu Ohnishi, Shu-Yu Zhu, Yutaka Yokoyama, Yoichi Katayama, Hideto Takano, Noriyuki Miki, Yuzo Senda, Ichiro Tamitani, Masakazu Yamashina

IEEE J. Solid State Circuits, 1997

An MPEG-2 encoder architecture based on a single-chip dedicated LSI with a control MPU.

Yasushi Ooi, Osamu Ohnishi, Yutaka Yokoyama, Yoichi Katayama, Masayuki Mizuno, Masakazu Yamashina, Hideo Takano, Naoya Hayashi, Ichiro Tamitani

Proceedings of the 1997 IEEE International Conference on Acoustics, 1997

1996

Capacitance coupling immune, transient sensitive accelerator for resistive interconnect signals of subquarter micron ULSI.

Tomofumi lima, Masayuki Mizuno, Tadahiko Horiuchi, Masakazu Yamashina

IEEE J. Solid State Circuits, 1996

A GHz MOS adaptive pipeline technique using MOS current-mode logic.

Masayuki Mizuno, Masakazu Yamashina, Koichiro Furuta, Hiroyuki Igura, Hitoshi Abiko, Kazuhiro Okabe, Atsuki Ono, Hachiro Yamada

IEEE J. Solid State Circuits, 1996