Masayuki Ishikawa

According to our database, Masayuki Ishikawa authored at least 11 papers between 1986 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Norm-Regularized Token Compression in Vision Transformer Networks.

Masayuki Ishikawa, Ryuto Ishibashi, Lin Meng

Proceedings of the 6th International Symposium on Advanced Technologies and Applications in the Internet of Things, 2024

2017

On suitable pseudo-noise code for optical-wireless hierarchical CSK-MPPM system.

Masayuki Ishikawa, Hiromasa Habuchi

Proceedings of the IEEE 6th Global Conference on Consumer Electronics, 2017

2008

Long Tail Recommender Utilizing Information Diffusion Theory.

Masayuki Ishikawa, Peter Géczy, Noriaki Izumi, Takahira Yamaguchi

Proceedings of the 2008 IEEE / WIC / ACM International Conference on Web Intelligence, 2008

Capturing Knowledge Worker Behavior Based on Information Diffusion Theory.

Masayuki Ishikawa, Peter Géczy, Noriaki Izumi, Takahira Yamaguchi

Proceedings of the Knowledge-Based Software Engineering, 2008

2007

Information Diffusion Approach to Cold-Start Problem.

Masayuki Ishikawa, Peter Géczy, Noriaki Izumi, Takeshi Morita, Takahira Yamaguchi

Proceedings of the 2007 IEEE/WIC/ACM International Conference on Web Intelligence and International Conference on Intelligent Agent Technology, 2007

1998

A 2-V, 2-GHz low-power direct digital frequency synthesizer chip-set for wireless communication.

Akihiro Yamagishi, Masayuki Ishikawa, Tsuneo Tsukahara, Shigeru Date

IEEE J. Solid State Circuits, 1998

1996

A 2-V 2-GHz Si-bipolar direct-conversion quadrature modulator.

Tsuneo Tsukahara, Masayuki Ishikawa, Masahiro Muraguchi

IEEE J. Solid State Circuits, 1996

1994

A Framework for Automatic Improvement of Workflows to Meet Performance Goals.

Trent Jaeger, Atul Prakash, Masayuki Ishikawa

Proceedings of the Sixth International Conference on Tools with Artificial Intelligence, 1994

1989

An 8-bit 50-MHz CMOS subranging A/D converter with pipelined wide-band S/H.

Masayuki Ishikawa, Tsuneo Tsukahara

IEEE J. Solid State Circuits, December, 1989

1988

An adaptive line equalizer VLSI using digital signal processing.

Masayuki Ishikawa, Yukio Tanaka, Tadakatsu Kimura

IEEE J. Solid State Circuits, June, 1988

1986

VLSI Architecture for an adaptive equalizer in ISDN line termination.

Masayuki Ishikawa, Tsuneo Tsukahara, Tadakatsu Kimura

Proceedings of the IEEE International Conference on Acoustics, 1986