Masatoshi Yamaguchi
Orcid: 0000-0003-2303-0280
According to our database1,
Masatoshi Yamaguchi
authored at least 8 papers
between 1999 and 2021.
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Bibliography
2021
An Energy-Efficient Time-Domain Analog CMOS BinaryConnect Neural Network Processor Based on a Pulse-Width Modulation Approach.
IEEE Access, 2021
2019
An Energy-efficient Time-domain Analog VLSI Neural Network Processor Based on a Pulse-width Modulation Approach.
CoRR, 2019
Live Demonstration: A VLSI Implementation of Time-Domain Analog Weighted-Sum Calculation Model for Intelligent Processing on Robots.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
A Chaotic Boltzmann Machine Working as a Reservoir and Its Analog VLSI Implementation.
Proceedings of the International Joint Conference on Neural Networks, 2019
2017
Proceedings of the 2017 International Joint Conference on Neural Networks, 2017
2016
A CMOS Unit Circuit Using Subthreshold Operation of MOSFETs for Chaotic Boltzmann Machines.
Proceedings of the Neural Information Processing - 23rd International Conference, 2016
2005
Neighboring crossover to improve GA-based Q-learning method for multi-legged robot control.
Proceedings of the Genetic and Evolutionary Computation Conference, 2005
1999
Minimizing the Maximum Delay for Reaching Consensus in Quorum-Based Mutual Exclusion Schemes.
IEEE Trans. Parallel Distributed Syst., 1999