Masato Sakate

According to our database, Masato Sakate authored at least 2 papers between 1992 and 1999.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

1999

A 2.5-GFLOPS, 6.5 million polygons per second, four-way VLIW geometry processor with SIMD instructions and a software bypass mechanism.

Hajime Kubosawa, Naoshi Higaki, Satoshi Ando, Hiromasa Takahashi, Yoshimi Asada, Hideaki Anbutsu, Tomio Sato, Masato Sakate, Atsuhiro Suga, Michihide Kimura, Hideo Miyake, Hiroshi Okano, Akira Asato, Yasunori Kimura, Hiroshi Nakayama, Masayoshi Kimoto, Katsuji Hirochi, Hideki Saito, Norio Kaido, Yukihiro Nakagawa, Toshio Shimada

IEEE J. Solid State Circuits, 1999

1992

An 8.5-ns 112-b transmission gate adder with a conflict-free bypass circuit.

Tomio Sato, Masato Sakate, H. Okada, T. Sukemura, Gensuke Goto

IEEE J. Solid State Circuits, April, 1992