Masato Sakao
According to our database1,
Masato Sakao
authored at least 2 papers
between 2000 and 2006.
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Bibliography
2006
Device Technology for embedded DRAM utilizing stacked MIM(Metal-Insulator-Metal) Capacitor.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006
2000
A 250-Mb/s/pin, 1-Gb double-data-rate SDRAM with a bidirectional delay and an interbank shared redundancy scheme.
IEEE J. Solid State Circuits, 2000