Masato Nakasato

According to our database, Masato Nakasato authored at least 3 papers between 2006 and 2008.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2008

Design for Testability Method to Avoid Error Masking of Software-Based Self-Test for Processors.

Masato Nakasato, Michiko Inoue, Satoshi Ohtake, Hideo Fujiwara

IEICE Trans. Inf. Syst., 2008

2007

Acceleration of Test Generation for Sequential Circuits Using Knowledge Obtained from Synthesis for Testability.

Masato Nakasato, Satoshi Ohtake, Kewal K. Saluja, Hideo Fujiwara

IEICE Trans. Inf. Syst., 2007

2006

Low-Cost Hardening of Image Processing Applications Against Soft Errors.

Ilia Polian, Bernd Becker, Masato Nakasato, Satoshi Ohtake, Hideo Fujiwara

Proceedings of the 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 2006