Masato Matsubayashi

According to our database, Masato Matsubayashi authored at least 4 papers between 2015 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2017

Security evaluation of cryptographic modules against side-channel attack using a biased data set.

Masato Matsubayashi, Hendra Guntur, Akashi Satoh

Proceedings of the IEEE 6th Global Conference on Consumer Electronics, 2017

2016

Comparison of side-channel attack on cryptographic cirucits between old and new technology FPGAs.

Yu Nomata, Masato Matsubayashi, Kohei Sawada, Akashi Satoh

Proceedings of the IEEE 5th Global Conference on Consumer Electronics, 2016

Clock glitch generator on SAKURA-G for fault injection attack against a cryptographic circuit.

Masato Matsubayashi, Akashi Satoh, Jun Ishii

Proceedings of the IEEE 5th Global Conference on Consumer Electronics, 2016

2015

Side-channel Attack user reference architecture board SAKURA-W for security evaluation of IC card.

Masato Matsubayashi, Akashi Satoh

Proceedings of the IEEE 4th Global Conference on Consumer Electronics, 2015