Masataka Matsui

According to our database, Masataka Matsui authored at least 13 papers between 1994 and 2007.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2007

Content-Based Complexity Reduction Methods for MPEG-2 to H.264 Transcoding.

Shen Li, Lingfeng Li, Takeshi Ikenaga, Shunichi Ishiwata, Masataka Matsui, Satoshi Goto

IEICE Trans. Inf. Syst., 2007

2006

A Hardware Implementation of a Content-Based Motion Estimation Algorithm for Real-Time MPEG-4 Video Coding.

Shen Li, Takeshi Ikenaga, Hideki Takeda, Masataka Matsui, Satoshi Goto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

Complexity Based Fast Coding Mode Decision for MPEG-2 / H.264 Video Transcoding.

Shen Li, Lingfeng Li, Takeshi Ikenaga, Shunichi Ishiwata, Masataka Matsui, Satoshi Goto

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005

Development of Image Recognition Processor Based on Configurable Processor.

Takashi Miyamori, Jun Tanabe, Yasuhiro Taniguchi, Kenji Furukawa, Tatsuo Kozakaya, Hiroaki Nakai, Yukimasa Miyamoto, Ken-ichi Maeda, Masataka Matsui

J. Robotics Mechatronics, 2005

DSP for wireless.

Lawrence Clark, Masataka Matsui

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2003

A single-chip MPEG-2 codec based on customizable media embedded processor.

Shunichi Ishiwata, Tomoo Yamakage, Yoshiro Tsuboi, Takayoshi Shimazawa, Tomoko Kitazawa, Shuji Michinaka, Kunihiko Yahagi, Hideki Takeda, Akihiro Oue, Tomoya Kodama, Nobu Matsumoto, Takayuki Kamei, Mitsuo Saito, Takashi Miyamori, Goichi Ootomo, Masataka Matsui

IEEE J. Solid State Circuits, 2003

Visconti: multi-VLIW image recognition processor based on configurable processor [obstacle detection applications].

Jun Tanahe, Yasuhiro Taniguchi, Takashi Miyamori, Yukimasa Miyamoto, Hideki Takeda, Masaya Tarui, Hiromitsu Nakayama, Nohuyulu Takeda, Kenichi Maeda, Masataka Matsui

Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2002

Design Methodology and System for a Configurable Media Embedded Processor Extensible to VLIW Architecture.

Atsushi Mizuno, Kazuyoshi Kohno, Ryuichiro Ohyama, Takahiro Tokuyoshi, Hironori Uetani, Hans Eichel, Takashi Miyamori, Nobu Matsumoto, Masataka Matsui

Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002

A single-chip MPEG-2 codec based on customizable media microprocessor.

Shunichi Ishiwata, Tomoo Yamakage, Yoshiro Tsuboi, Takayoshi Shimazawa, Tomoko Kitazawa, Shuji Michinaka, Kunihiko Yahagi, Hideki Takeda, Akihiro Oue, Tomoya Kodama, Nobu Matsumoto, Takayuki Kamei, Takashi Miyamori, Goichi Ootomo, Masataka Matsui

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2000

Energy-efficient 32 × 32-bit multiplier in tunable near-zero threshold CMOS.

Vjekoslav Svilan, Masataka Matsui, James B. Burr

Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000

Repeater insertion method and its application to a 300MHz 128-bit 2-way superscalar microprocessor.

Norman Kojima, Yukiko Parameswar, Christian Klingner, Yukio Ohtaguro, Masataka Matsui, Shigeaki Iwasa, Tatsuo Teruyama, Takayoshi Shimazawa, Hideki Takeda, Kouji Hashizume, Haruyuki Tago, Masaaki Yamada

Proceedings of ASP-DAC 2000, 2000

1994

A 200 MHz 13 mm² 2-D DCT macrocell using sense-amplifying pipeline flip-flop scheme.

Masataka Matsui, Hiroyuki Hara, Yoshiharu Uetani, Lee-Sup Kim, Tetsu Nagamatsu, Yoshinori Watanabe, Akihiko Chiba, Kouji Matsuda, Takayasu Sakurai

IEEE J. Solid State Circuits, December, 1994

A 110-MHz/1-Mb synchronous TagRAM.

Yasuo Unekawa, Tsuguo Kobayashi, Tsukasa Shirotori, Yukihiro Fujimoto, Takayoshi Shimazawa, Kazutaka Nogami, Takehiko Nakao, Kazukiro Sawada, Masataka Matsui, Takayasu Sakurai, Man Kit Tang, William A. Huffman

IEEE J. Solid State Circuits, April, 1994