Masashi Takada

According to our database, Masashi Takada authored at least 6 papers between 2007 and 2015.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2015

Multi-tiers route design coordinating QoS-specific K shortest paths over optical network.

Hideki Tode, Masashi Takada, Yosuke Tanigawa

Proceedings of the IEEE International Conference on Communication, 2015

2014

Optical Network Management System for Instant Provisioning of QoS-Aware Path and Its Software Prototyping with OpenFlow.

Masashi Takada, Akira Fukushima, Yosuke Tanigawa, Hideki Tode

IEICE Trans. Commun., 2014

2013

Hardware support for resource partitioning in real-time embedded systems.

Tetsuro Honmura, Yuki Kondo, Tetsuya Yamada, Masashi Takada, Takumi Nitoh, Tohru Nojiri, Keisuke Toyama, Yasuhiko Saitoh, Hirofumi Nishi, Mikiko Sato, Mitaro Namiki

Proceedings of the 2013 IEEE Symposium on Low-Power and High-Speed Chips, 2013

2009

Green Multicore-SoC Software-Execution Framework with Timely-Power-Gating Scheme.

Masafumi Onouchi, Keisuke Toyama, Tohru Nojiri, Makoto Sato, Masayoshi Mase, Jun Shirako, Mikiko Sato, Masashi Takada, Masayuki Ito, Hiroyuki Mizuno, Mitaro Namiki, Keiji Kimura, Hironori Kasahara

Proceedings of the ICPP 2009, 2009

2008

An 8640 MIPS SoC with Independent Power-Off Control of 8 CPUs and 8 RAMs by An Automatic Parallelizing Compiler.

Masayuki Ito, Toshihiro Hattori, Yutaka Yoshida, Kiyoshi Hayase, Tomoichi Hayashi, Osamu Nishii, Yoshihiko Yasu, Atsushi Hasegawa, Masashi Takada, Hiroyuki Mizuno, Kunio Uchiyama, Toshihiko Odaka, Jun Shirako, Masayoshi Mase, Keiji Kimura, Hironori Kasahara

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2007

A 4320MIPS Four-Processor Core SMP/AMP with Individually Managed Clock Frequency for Low Power Consumption.

Yutaka Yoshida, Tatsuya Kamei, Kiyoshi Hayase, Shinichi Shibahara, Osamu Nishii, Toshihiro Hattori, Atsushi Hasegawa, Masashi Takada, Naohiko Irie, Kunio Uchiyama, Toshihiko Odaka, Kiwamu Takada, Keiji Kimura, Hironori Kasahara

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007