Masashi Kuwako
According to our database1,
Masashi Kuwako
authored at least 4 papers
between 1994 and 1998.
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Bibliography
1998
1997
TITAC-2: An asynchronous 32-bit microprocessor based on Scalable-Delay-Insensitive model.
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997
1994
IEEE Des. Test Comput., 1994
Timing-reliability evaluation of asynchronous circuits based on different delay models.
Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems, 1994