Masaru Koyanagi

According to our database, Masaru Koyanagi authored at least 4 papers between 1990 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Low Power and Thermal Throttling-less SSD with In-Package Boost Converter for 1000-WL Layer 3D Flash Memory.

Kazuma Hasegawa, Yuta Aiba, Xu Li, Hitomi Tanaka, Takayuki Miyazaki, Hideko Mukaida, Masaru Koyanagi, Masayuki Miura, Tomoya Sanuki

Proceedings of the IEEE International Memory Workshop, 2023

2008

A 120mm² 16Gb 4-MLC NAND Flash Memory with 43nm CMOS Technology.

Kazushige Kanda, Masaru Koyanagi, Toshio Yamamura, Koji Hosono, Masahiro Yoshihara, Toru Miwa, Yosuke Kato, Alex Mak, Siu Lung Chan, Frank Tsai, Raul Cernea, Binh Le, Eiichi Makino, Takashi Taira, Hiroyuki Otake, Norifumi Kajimura, Susumu Fujimura, Yoshiaki Takeuchi, Mikihiko Itoh, Masanobu Shirakawa, Dai Nakamura, Yuya Suzuki, Yuki Okukawa, Masatsugu Kojima, Kazuhide Yoneya, Takamichi Arizono, Toshiki Hisada, Shinji Miyamoto, Mitsuhiro Noguchi, Toshitake Yaegashi, Masaaki Higashitani, Fumitoshi Ito, Teruhiko Kamei, Gertjan Hemink, Tooru Maruyama, Kazumi Ino, Shigeo Ohshima

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

Conventional Method for Optimizing a Multiplexing System to Achieve a Reliable and Cost Effective Network.

Toshikazu Sakano, Masaru Koyanagi, Yasuhiro Hataya, Masaya Okada, Yukio Ito

Proceedings of the Global Communications Conference, 2008. GLOBECOM 2008, New Orleans, LA, USA, 30 November, 2008

1990

Decoded-source sense amplifier for high-density DRAMs.

Jun-ichi Okamura, Yoshio Okada, Masaru Koyanagi, Yoshiaki Takeuchi, Masahiro Yamada, Kiyofumi Sakurai, Sadao Imada, Suzuo Saito

IEEE J. Solid State Circuits, February, 1990