Masanobu Saito

According to our database, Masanobu Saito authored at least 5 papers between 2000 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2014

Pre-Driving Needless System for Autonomous Mobile Robots Navigation in Real World Robot Challenge 2013.

Masanobu Saito, Kentaro Kiuchi, Shogo Shimizu, Takayuki Yokota, Yusuke Fujino, Takato Saito, Yoji Kuroda

J. Robotics Mechatronics, 2014

2007

Fluoroscopic Bone Fragment Tracking for Surgical Navigation in Femur Fracture Reduction by Incorporating Optical Tracking of Hip Joint Rotation Center.

Yoshikazu Nakajima, Takahito Tashiro, Nobuhiko Sugano, Kazuo Yonenobu, Tsuyoshi Koyama, Yuki Maeda, Yuichi Tamura, Masanobu Saito, Shinichi Tamura, Mamoru Mitsuishi, Naohiko Sugita, Ichiro Sakuma, Takahiro Ochi, Yoichiro Matsumoto

IEEE Trans. Biomed. Eng., 2007

2004

Computer-assisted fracture reduction of proximal femur using preoperative CT data and intraoperative fluoroscopic images.

Yoshikazu Nakajima, Takahito Tashiro, Toshiyuki Okada, Yoshinobu Sato, Nobuhiko Sugano, Masanobu Saito, Kazuo Yonenobu, Hideki Yoshikawa, Takahiro Ochi, Shinichi Tamura

Proceedings of the CARS 2004. Computer Assisted Radiology and Surgery. Proceedings of the 18th International Congress and Exhibition, 2004

2002

A 125-mm² 1-Gb NAND flash memory with 10-MByte/s program speed.

Kenichi Imamiya, Hiroshi Nakamura, Toshihiko Himeno, Toshio Yamamura, Tamio Ikehashi, Ken Takeuchi, Kazushige Kanda, Koji Hosono, Takuya Futatsuyama, Koichi Kawai, Riichiro Shirota, Norihisa Arai, Fumitaka Arai, Kazuo Hatakeyama, Hiroaki Hazama, Masanobu Saito, Hisataka Meguro, Kevin Conley, Khandker Quader, Jian J. Che

IEEE J. Solid State Circuits, 2002

2000

A channel-erasing 1.8-V-only 32-Mb NOR flash EEPROM with a bitline direct sensing scheme.

Shigeru Atsumi, Akira Umezawa, Tooru Tanzawa, Tadayuki Taura, Hitoshi Shiga, Yoshinori Takano, Takeshi Miyaba, Michiharu Matsui, Hiroshi Watanabe, Kazuaki Isobe, Shota Kitamura, Seiji Yamada, Masanobu Saito, Seiichi Mori, Toshiharu Watanabe

IEEE J. Solid State Circuits, 2000