Masanao Maruta
According to our database1,
Masanao Maruta
authored at least 5 papers
between 2001 and 2005.
Collaborative distances:
Collaborative distances:
Timeline
2001
2002
2003
2004
2005
0
1
2
3
1
1
1
1
1
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2005
IEEE J. Solid State Circuits, 2005
2002
0.13-μm 32-Mb/64-Mb embedded DRAM core with high efficient redundancy and enhanced testability.
IEEE J. Solid State Circuits, 2002
A Variable Drivability (VD) Output Buffer for the System In a Package (SIP) and High Frequency Wafer Test.
Proceedings of the Proceedings IEEE International Test Conference 2002, 2002
2001
IEEE J. Solid State Circuits, 2001
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001