Masakazu Kurisu

According to our database, Masakazu Kurisu authored at least 1 paper in 1996.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

1996

2.8-Gb/s 176-mW byte-interleaved and 3.0-Gb/s 118-mW bit-interleaved 8: 1 multiplexers with a 0.15-μm CMOS technology.

Masakazu Kurisu, Makoto Kaneko, Tetsuyuki Suzaki, Akira Tanabe, Mitsuhiro Togo, Akio Furukawa, Takao Tamura, Ken Nakajima, Kazuyoshi Yoshida

IEEE J. Solid State Circuits, 1996