Masakazu Hioki

According to our database, Masakazu Hioki authored at least 14 papers between 2004 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Multiplication-Free Lookup-Based CNN Accelerator Using Residual Vector Quantization and Its FPGA Implementation.

Hiroshi Fuketa, Toshihiro Katashita, Yohei Hori, Masakazu Hioki

IEEE Access, 2024

2022

An Automatic Loop Gain Enhancement Technique in Magnetoimpedance-Based Magnetometer.

Ippei Akita, Takeshi Kawano, Hitoshi Aoyama, Shunichi Tatematsu, Masakazu Hioki

IEEE J. Solid State Circuits, 2022

A 2.6mW 10pTI √ Hz 33kHz Magnetoimpedance-Based Magnetometer with Automatic Loop-Gain and Bandwidth Enhancement.

Ippei Akita, Takeshi Kawano, Hitoshi Aoyama, Shunichi Tatematsu, Masakazu Hioki

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2018

Development of an Evaluation Platform and Performance Experimentation of Flex Power FPGA Device.

Toshihiro Katashita, Masakazu Hioki, Yohei Hori, Hanpei Koike

IEICE Trans. Inf. Syst., 2018

2016

Low Overhead Design of Power Reconfigurable FPGA with Fine-Grained Body Biasing on 65-nm SOTB CMOS Technology.

Masakazu Hioki, Hanpei Koike

IEICE Trans. Inf. Syst., 2016

2013

Fully-functional FPGA prototype with fine-grain programmable body biasing.

Masakazu Hioki, Toshihiro Sekigawa, Tadashi Nakagawa, Hanpei Koike, Yohei Matsumoto, Takashi Kawanami, Toshiyuki Tsutsumi

Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

2008

Suppression of Intrinsic Delay Variation in FPGAs using Multiple Configurations.

Yohei Matsumoto, Masakazu Hioki, Takashi Kawanami, Hanpei Koike, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa

ACM Trans. Reconfigurable Technol. Syst., 2008

2007

Optimization of the Body Bias Voltage Set (BBVS) for Flex Power FPGA.

Takashi Kawanami, Masakazu Hioki, Yohei Matsumoto, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike

IEICE Trans. Inf. Syst., 2007

A Power Configurable Block Array Connected in Series as First Prototype Flex Power FPGA Chip.

Masakazu Hioki, Takashi Kawanami, Yohei Matsumoto, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike, Toshiyuki Tsutsumi

Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

Performance and yield enhancement of FPGAs with within-die variation using multiple configurations.

Yohei Matsumoto, Masakazu Hioki, Takashi Kawanami, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike

Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, 2007

2006

Optimal set of body bias voltages for an FPGA with field-programmable V_th components.

Takashi Kawanami, Masakazu Hioki, Yohei Matsumoto, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike

Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006

Evaluation of granularity on threshold voltage control in flex power FPGA.

Masakazu Hioki, Takashi Kawanami, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike

Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006

2004

Preliminary Evaluation of Flex Power FPGA: A Power Reconfigurable Architecture with Fine Granularity.

Takashi Kawanami, Masakazu Hioki, Hiroshi Nagase, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike

IEICE Trans. Inf. Syst., 2004

Preliminary performance analysis of flex power FPGA, a power reconfigurable device with fine granularity.

Takashi Kawanami, Masakazu Hioki, Hiroshi Nagase, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike

Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004