Masahiro Numa
According to our database1,
Masahiro Numa
authored at least 69 papers
between 1995 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
Technology Remapping Approach Using Multi-Gate Reconfigurable Cells for Post-Mask Functional ECO.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2024
2021
Multi-Category Image Super-Resolution with Convolutional Neural Network and Multi-Task Learning.
IEICE Trans. Inf. Syst., 2021
A 35-mV supply ring oscillator consisting of stacked body bias inverters for extremely low-voltage LSIs.
IEICE Electron. Express, 2021
2020
Improvement of Luminance Isotropy for Convolutional Neural Networks-Based Image Super-Resolution.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2020
An 11.8 nA ultra-low power active diode using a hysteresis common gate comparator for low-power energy harvesting systems.
IEICE Electron. Express, 2020
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020
A 34-mV Startup Ring Oscillator Using Stacked Body Bias Inverters for Extremely Low-Voltage Thermoelectric Energy Harvesting.
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020
2019
Sub-0.1V Input, Low-Voltage CMOS Driver Circuit for Multi-Stage Switched Capacitor Voltage Boost Converter.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
2018
A Sub-1-µs Start-Up Time, Fully-Integrated 32-MHz Relaxation Oscillator for Low-Power Intermittent Systems.
IEICE Trans. Electron., 2018
An ultra-low power active diode using a hysteresis common gate comparator for low-voltage and low-power energy harvesting systems.
Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018
Analytical Study of Multi-stage Switched-Capacitor Voltage Boost Converter for Ultra-low Voltage Energy Harvesting.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Switched-Capacitor Voltage Buck Converter with Step-Down-Ratio and Clock-Frequency Controllers for Ultra-Low-Power IoT Devices.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018
2017
An 80-mV-to-1.8-V Conversion-Range Low-Energy Level Shifter for Extremely Low-Voltage VLSIs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017
An area-efficient, 0.022-mm2, fully integrated resistor-less relaxation oscillator for ultra-low power real-time clock applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
A 0.1-0.6 V input range voltage boost converter with low-leakage driver for low-voltage energy harvesting.
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017
An ultra-low-power supercapacitor voltage monitoring system for low-voltage energy harvesting.
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017
Sub-1-μs start-up time, 32-MHz relaxation oscillator for low-power intermittent VLSI systems.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
2016
Fully-Integrated High-Conversion-Ratio Dual-Output Voltage Boost Converter With MPPT for Low-Voltage Energy Harvesting.
IEEE J. Solid State Circuits, 2016
A Highly Efficient Switched-Capacitor Voltage Boost Converter with Nano-Watt MPPT Controller for Low-Voltage Energy Harvesting.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2016
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016
A fully integrated, 1-µs start-up time, 32-MHz relaxation oscillator for low-power intermittent systems.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016
A 1.66-nW/kHz, 32.7-kHz, 99.5ppm/°C fully integrated current-mode RC oscillator for real-time clock applications with PVT stability.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016
A 0.38-μW stand-by power, 50-nA-to-1-mA load current range DC-DC converter with self-biased linear regulator for ultra-low power battery management.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016
2015
A 32-kHz Real-Time Clock Oscillator with On-Chip PVT Variation Compensation Circuit for Ultra-Low Power MCUs.
IEICE Trans. Electron., 2015
An Energy-Efficient 24T Flip-Flop Consisting of Standard CMOS Gates for Ultra-Low Power Digital VLSIs.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015
Energy-efficient AES SubBytes transformation circuit using asynchronous circuits for ultra-low voltage operation.
IEICE Electron. Express, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
A fully-integrated, high-conversion-ratio and dual-output voltage boost converter with MPPT for low-voltage energy harvesting.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015
A 0.21-V minimum input, 73.6% maximum efficiency, fully integrated 3-terminal voltage converter with MPPT for low-voltage energy harvesters.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
2014
A Fully On-Chip, 6.66-kHz, 320-nA, 56ppm/°C, CMOS Relaxation Oscillator with PVT Variation Compensation Circuit.
IEICE Trans. Electron., 2014
A 24-transistor static flip-flop consisting of nors and inverters for low-power digital vlsis.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014
A 0.21-V minimum input, 73.6% maximum efficiency, fully integrated voltage boost converter with MPPT for low-voltage energy harvesters.
Proceedings of the ESSCIRC 2014, 2014
2013
1.2-V Supply, 100-nW, 1.09-V Bandgap and 0.7-V Supply, 52.5-nW, 0.55-V Subbandgap Reference Circuits for Nanowatt CMOS LSIs.
IEEE J. Solid State Circuits, 2013
A 32.55-kHz, 472-nW, 120ppm/°C, fully on-chip, variation tolerant CMOS relaxation oscillator for a real-time clock application.
Proceedings of the ESSCIRC 2013, 2013
2012
A Low-Power Level Shifter With Logic Error Correction for Extremely Low-Voltage Digital CMOS LSIs.
IEEE J. Solid State Circuits, 2012
A 6.66-kHz, 940-nW, 56ppm/°C, fully on-chip PVT variation tolerant CMOS relaxation oscillator.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
Proceedings of the 38th European Solid-State Circuit conference, 2012
2011
Robust Subthreshold CMOS Digital Circuit Design with On-Chip Adaptive Supply Voltage Scaling Technique.
IEICE Trans. Electron., 2011
Subthreshold SRAM with Write Assist Technique Using On-Chip Threshold Voltage Monitoring Circuit.
IEICE Trans. Electron., 2011
A wide input voltage range level shifter circuit for extremely low-voltage digital LSIs.
IEICE Electron. Express, 2011
A level shifter with logic error correction circuit for extremely low-voltage digital CMOS LSIs.
Proceedings of the 37th European Solid-State Circuits Conference, 2011
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011
A 95-nA, 523ppm/°C, 0.6-μW CMOS current reference circuit with subthreshold MOS resistor ladder.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
2010
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
A nano-ampere current reference circuit and its temperature dependence control by using temperature characteristics of carrier mobilities.
Proceedings of the 36th European Solid-State Circuits Conference, 2010
2009
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009
A Look-ahead Active Body-biasing scheme for SOI-SRAM with dynamic <i>V</i><sub>DDM</sub> control.
IEICE Electron. Express, 2009
2008
Low Power SRAM with Boost Driver Generating Pulsed Word Line Voltage for Sub-1V Operation.
J. Comput., 2008
2007
Look-Ahead Dynamic Threshold Voltage Control Scheme for Improving Write Margin of SOI-7T-SRAM.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007
Boosted Voltage Scheme with Active Body-Biasing Control on PD-SOI for Ultra Low Voltage Operation.
IEICE Trans. Electron., 2007
IEICE Electron. Express, 2007
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
2006
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006
IEICE Electron. Express, 2006
High Performance CMOS Circuit by Using Charge Recycling Active Body-Bias Controlled SOI.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006
2004
Proceedings of the Integrated Circuit and System Design, 2004
Adaptive arithmetic coding for image prediction errors.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
A technique for high-speed circuits on SOI using look-ahead type active body bias control.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Leakage power reduction for clock gating scheme on PD-SOI.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
2003
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003
2000
1997
A diagnosis method for single logic design errors in gate-level combinational circuits.
Syst. Comput. Jpn., 1997
1995