Masahiro Muraguchi
According to our database1,
Masahiro Muraguchi
authored at least 25 papers
between 1994 and 2021.
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Bibliography
2021
ICT Express, 2021
2020
Int. J. Commun. Syst., 2020
A Caching Scheme Based on Popularity and Generation Time of Feedback Information in Edge Computing.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2020
2019
Residual Capacity-Aware Virtual Machine Assignment for Reducing Network Loads in Multi-tenant Data Center Networks.
J. Netw. Syst. Manag., 2019
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2019
2018
Int. J. Distributed Sens. Networks, 2018
2017
Proceedings of the 2017 International Conference on Information Networking, 2017
Proceedings of the 23rd Asia-Pacific Conference on Communications, 2017
Proceedings of the 23rd Asia-Pacific Conference on Communications, 2017
2016
J. Commun. Networks, 2016
2015
Proceedings of the International Conference on Computer, 2015
Proceedings of the International Conference on Computer, 2015
Proceedings of the 17th Asia-Pacific Network Operations and Management Symposium, 2015
2013
Dynamic lightpath establishment considering four-wave mixing in multifiber WDM networks.
Photonic Netw. Commun., 2013
2011
2008
Multi-Channel Multi-Stage Transmultiplexing Digital Down Converter and Its Application to RFID (ISO18000-3 mode 2) Reader/Writer.
IEICE Trans. Commun., 2008
2007
Novel Multi-Stage Transmultiplexing Digital Down Converter for Implementation of RFID (ISO18000-3 MODE 2) Reader/Writer.
Proceedings of the 65th IEEE Vehicular Technology Conference, 2007
2006
Low-power InP-HEMT switch ICs integrating miniaturized 2×2 switches for 10-Gb/s systems.
IEEE J. Solid State Circuits, 2006
2005
A 24-Gsps 3-Bit Nyquist ADC Using InP HBTs for DSP-Based Electronic Dispersion Compensation.
IEICE Trans. Electron., 2005
2004
A 39-to-45-Gbit/s multi-data-rate clock and data recovery circuit with a robust lock detector.
IEEE J. Solid State Circuits, 2004
2003
A Fractional Phase Interpolator Using Two-Step Integration for Frequency Multiplication and Direct Digital Synthesis.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003
2001
A low-power direct digital synthesizer using a self-adjusting phase-interpolation technique.
IEEE J. Solid State Circuits, 2001
1998
Sampling phase detector using a resonant tunneling high electron mobility transistor for microwave phase-locked oscillators.
IEEE Trans. Very Large Scale Integr. Syst., 1998
1996
IEEE J. Solid State Circuits, 1996
1994
1.9 GHz-band low voltage and low power consumption RF IC chip-set for personal communications.
Proceedings of 44th IEEE Vehicular Technology Conference: Creating Tomorrow's Mobile Systems, 1994