Masahiko Iwane

According to our database, Masahiko Iwane authored at least 12 papers between 1992 and 2010.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2010

An Efficient Hardware Architecture from C Program with Memory Access to Hardware.

Akira Yamawaki, Seiichi Serikawa, Masahiko Iwane

Proceedings of the Computational Science and Its Applications, 2010

2009

An intermediate hardware model with load/store unit for C to FPGA.

Akira Yamawaki, Masahiko Iwane

Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

An Efficient Comparative Evaluation to Buffering Methods for Window-based Image Processing Using Semi-programmable Hardware.

Akira Yamawaki, Seiichi Serikawa, Masahiko Iwane

Proceedings of the 2009 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2009

2008

An FPGA implementation of a DWT with 5/3 filter using semi-programmable hardware.

Akira Yamawaki, Kazuharu Morita, Masahiko Iwane

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007

An FPGA implementation of a snoop cache with synchronization for a multiprocessor system-on-chip.

Akira Yamawaki, Masahiko Iwane

Proceedings of the 13th International Conference on Parallel and Distributed Systems, 2007

A Programmable Load/Store Unit on C-based Hardware Design for FPGA.

Akira Yamawaki, Masahiko Iwane

Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

2005

Coherence Maintenances to realize an efficient parallel processing for a Cache Memory with Synchronization on a Chip-Multiprocessor.

Akira Yamawaki, Masahiko Iwane

Proceedings of the 8th International Symposium on Parallel Architectures, 2005

An efficient parallel processing using a cache memory with synchronization on a Soc-multiprocessor.

Akira Yamawaki, Masahiko Iwane

Proceedings of the Third IASTED International Conference on Circuits, 2005

2004

Evaluation of mechanisms introduced to improve performance of TSVM cache.

Akira Yamawaki, Masahiko Iwane

Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks, 2004

2002

Organization of Shared Memory with Synchronization for Multiprocessor-on-a-chip.

Akira Yamawaki, Masahiko Iwane

Proceedings of the 9th International Conference on Parallel and Distributed Systems, 2002

2001

Tagged communication and synchronization memory for multiprocessor-on-a-chip.

Masahiko Iwane, Akira Yamawaki, Makoto Tanaka

Syst. Comput. Jpn., 2001

1992

Extracting distance from defocused images with different aperture sizes.

Masahiko Iwane

Syst. Comput. Jpn., 1992