Masahide Miyazaki

According to our database, Masahide Miyazaki authored at least 4 papers between 2003 and 2006.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2006

A Memory Grouping Method for Reducing Memory BIST Logic of System-on-Chips.

Masahide Miyazaki, Tomokazu Yoneda, Hideo Fujiwara

IEICE Trans. Inf. Syst., 2006

A memory grouping method for sharing memory BIST logic.

Masahide Miyazaki, Tomokazu Yoneda, Hideo Fujiwara

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2004

A DFT Selection Method for Reducing Test Application Time of System-on-Chips.

Masahide Miyazaki, Toshinori Hosokawa, Hiroshi Date, Michiaki Muraoka, Hideo Fujiwara

IEICE Trans. Inf. Syst., 2004

2003

A Method of Test Plan Grouping to Shorten Test Length for RTL Data Paths under a Test Controller Area Constraint.

Toshinori Hosokawa, Hiroshi Date, Masahide Miyazaki, Michiaki Muraoka, Hideo Fujiwara

Proceedings of the 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, 2003