Masaharu Tanaka

According to our database, Masaharu Tanaka authored at least 8 papers between 1993 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2018

A Study of FPGA Instance Based PLC Architecture Design and Automatic Generation Algorithm of Logic Code.

Renya Yamamoto, Masaharu Tanaka, Haruhi Eto, Fujio Kurokawa

Proceedings of the Complex, Intelligent, and Software Intensive Systems, 2018

2017

An FPGA Based Heterogeneous Redundant Control System Using Controller Virtualization.

Masaharu Tanaka, Haruhi Eto, Nobumasa Matsui, Fujio Kurokawa

Proceedings of the Complex, Intelligent, and Software Intensive Systems, 2017

2016

A Redundant Design Approach with Diversity of FPGA Resource Mapping.

Yudai Shirakura, Taisei Segawa, Yuichiro Shibata, Kenichi Morimoto, Masaharu Tanaka, Masanori Nobe, Hidenori Maruta, Fujio Kurokawa

Proceedings of the Applied Reconfigurable Computing - 12th International Symposium, 2016

2004

Multiroute planning for aircraft using genetic algorithms.

Masaharu Tanaka, Masanobu Mizoguchi, Toshiaki Tange, Isao Takami, Shinji Suzuki

Syst. Comput. Jpn., 2004

1998

Data Compression for Digital Color Electrophotographic Printer with Evolvable Hardware.

Masaharu Tanaka, Hidenori Sakanashi, Mehrdad Salami, Masaya Iwata, Takio Kurita, Tetsuya Higuchi

Proceedings of the Evolvable Systems: From Biology to Hardware, 1998

On-Line Compression of High Precision Printer Images by Evolvable Hardware.

Mehrdad Salami, Hidenori Sakanashi, Masaharu Tanaka, Masaya Iwata, Takio Kurita, Tetsuya Higuchi

Proceedings of the Data Compression Conference, 1998

1995

Defect-Tolerant WSI File Memory System Using Address Permutation for Spare Allocation.

Eiji Fujiwara, Masaharu Tanaka

IEICE Trans. Inf. Syst., 1995

1993

A Defect-Tolerant WSI File Memory System Using Address Permutation Scheme for Spare Allocation.

Eiji Fujiwara, Masaharu Tanaka

Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1993