Masaaki Hirata

According to our database, Masaaki Hirata authored at least 2 papers between 2005 and 2006.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2006

An Integrated Timing and Dynamic Supply Noise Verification for Multi-10-Million Gate SoC Designs.

Kenji Shimazaki, Makoto Nagata, Mitsuya Fukazawa, Shingo Miyahara, Masaaki Hirata, Kazuhiro Satoh, Hiroyuki Tsujikawa

IEICE Trans. Electron., 2006

2005

An integrated timing and dynamic supply noise verification for nano-meter CMOS SoC designs.

Kenji Shimazaki, Mitsuya Fukazawa, Makoto Nagata, Shingo Miyahara, Masaaki Hirata, Kazuhiro Satoh, Hiroyuki Tsujikawa

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005