Martin Vorbach

According to our database1, Martin Vorbach authored at least 10 papers between 2003 and 2011.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2011
Dynamic Reconfiguration for Irregular Code Using FNC-PAE Processor Cores.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

2010
FPGA-based combined architecture for stream categorization and intrusion detection.
Proceedings of the 8th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2010), 2010

2004
Coarse-grain reconfigurable XPP devices for adaptive high-end mobile video-processing.
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

Using function folding to improve silicon efficiency of reconfigurable arithmetic arrays.
Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

The XPP Architecture and Its Co-simulation Within the Simulink Environment.
Proceedings of the Field Programmable Logic and Application, 2004

2003
PACT XPP - A Self-Reconfigurable Data Processing Architecture.
J. Supercomput., 2003

Architecture, Memory and Interface Technology Integration of an Industrial/Academic Configurable System-on-Chip (CSoC).
Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003

Reconfigurable Processor Architectures for Mobile Phones.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

PACT XPP Architecture in Adaptive System-on-Chip Integration.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23, 2003

An Industrial/Academic Configurable System-on-Chip Project (CSoC): Coarse-Grain XXP-/Leon-Based Architecture Integration.
Proceedings of the 2003 Design, 2003


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