Martin Rozkovec

Orcid: 0000-0001-5221-616X

According to our database1, Martin Rozkovec authored at least 18 papers between 2008 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2020
Decompressors using nonlinear codes.
Microprocess. Microsystems, 2020

2019
Combinational Decompressors with Nonlinear Codes.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

2017
Sequential Test Decompressors with Fast Tester Bits Wide-Spreading.
J. Circuits Syst. Comput., 2017

2016
Polynomial Based NUC Implemented on FPGA.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

Test Decompressor Effectivity Improvement.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

Sequential test decompressors with fast variable wide spreading.
Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016

2015
Test compression for circuits with multiple scan chains.
Proceedings of the 16th Latin-American Test Symposium, 2015

LFSR Reseeding Based Test Compression Respecting Different Controllability of Decompressor Outputs.
Proceedings of the 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2015

2014
A highly flexible reconfigurable system on a Xilinx FPGA.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

Test-data compression with low number of channels and short test time.
Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014

2013
Relocation of reconfigurable modules on Xilinx FPGA.
Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013

Test pattern decompression in parallel scan chain architecture.
Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013

2012
An evaluation of the application dependent FPGA test method.
Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

2011
Test vector overlapping based compression tool for narrow test access mechanism.
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

2010
Application dependent FPGA testing method using compressed deterministic test vectors.
Proceedings of the 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 2010

Application Dependent FPGA Testing Method.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

2009
Structural test of programmed FPGA circuits.
Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009

2008
Implementation of Dynamically Reconfigurable Test Architecture for FPGA Circuits.
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008


  Loading...