Martin Langhammer

Orcid: 0000-0001-8206-2077

Affiliations:
  • Intel


According to our database1, Martin Langhammer authored at least 53 papers between 2008 and 2024.

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Bibliography

2024
CSAIL2019 Crypto-Puzzle Solver Architecture.
ACM Trans. Reconfigurable Technol. Syst., September, 2024

Soft GPGPU versus IP cores: Quantifying and Reducing the Performance Gap.
Proceedings of the 14th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2024

FPGA Modular Multipliers using Hybrid Reduction Techniques.
Proceedings of the 34th International Conference on Field-Programmable Logic and Applications, 2024

A Statically and Dynamically Scalable Soft GPGPU.
Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2024

Multiplier Architecture with a Carry-Based Partial Product Encoding.
Proceedings of the 31st IEEE Symposium on Computer Arithmetic, 2024

2023
Microscaling Data Formats for Deep Learning.
CoRR, 2023

HyperBlock Floating Point: Generalised Quantization Scheme for Gradient and Inference Computation.
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2023

eGPU: A 750 MHz Class Soft GPGPU for FPGA.
Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023

Extracting low-precision floating-point adders from embedded hard FP DSP Blocks on FPGAs.
Proceedings of the 30th IEEE Symposium on Computer Arithmetic, 2023

2022
Stratix 10 NX Architecture.
ACM Trans. Reconfigurable Technol. Syst., 2022

Low-Latency Modular Exponentiation for FPGAs.
Proceedings of the 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2022

2021
Specializing FGPU for Persistent Deep Learning.
ACM Trans. Reconfigurable Technol. Syst., 2021

FlexScore: Quantifying Flexibility.
IEEE Comput. Archit. Lett., 2021

DO-GPU: Domain Optimizable Soft GPUs.
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

Dense FPGA Compute Using Signed Byte Tuples.
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

Efficient FPGA Modular Multiplication Implementation.
Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

Folded Integer Multiplication for FPGAs.
Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

Stratix 10 NX Architecture and Applications.
Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

2020
SpiderWeb - High Performance FPGA NoC.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

EduPar-20 Keynote Speaker.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

Beyond Peak Performance: Comparing the Real Performance of AI-Optimized FPGAs and GPUs.
Proceedings of the International Conference on Field-Programmable Technology, 2020

High Density Pipelined 8bit Multiplier Systolic Arrays for FPGA.
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

Architectural Enhancements in Intel® Agilex™ FPGAs.
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

High Density 8-Bit Multiplier Systolic Arrays For Fpga.
Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020

Next Generation Arithmetic for Edge Computing.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
High Performance Scalable FPGA Accelerator for Deep Neural Networks.
CoRR, 2019

BFLOAT MLP Training Accelerator for FPGAs.
Proceedings of the 2019 International Conference on ReConFigurable Computing and FPGAs, 2019

Extracting INT8 Multipliers from INT18 Multipliers.
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

Evaluating and Enhancing Intel® Stratix® 10 FPGAs for Persistent Real-Time AI.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

Fractal Synthesis: Invited Tutorial.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

Why Compete When You Can Work Together: FPGA-ASIC Integration for Persistent RNNs.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

High Precision, High Performance FPGA Adders.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

2018
Activation Function Architectures for FPGAs.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

High-Performance QR Decomposition for FPGAs.
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

High Density and Performance Multiplication for FPGA.
Proceedings of the 25th IEEE Symposium on Computer Arithmetic, 2018

2017
Single Precision Logarithm and Exponential Architectures for Hard Floating-Point Enabled FPGAs.
IEEE Trans. Computers, 2017

Floating Point Tangent Implementation for FPGAs.
Proceedings of the 24th IEEE Symposium on Computer Arithmetic, 2017

QRD for Parallel Arithmetic Structures.
Proceedings of the 24th IEEE Symposium on Computer Arithmetic, 2017

2016
Single Precision Natural Logarithm Architecture for Hard Floating-Point and DSP-Enabled FPGAs.
Proceedings of the 23nd IEEE Symposium on Computer Arithmetic, 2016

2015
Floating-Point DSP Block Architecture for FPGAs.
Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015


Design and Implementation of an Embedded FPGA Floating Point DSP Block.
Proceedings of the 22nd IEEE Symposium on Computer Arithmetic, 2015

2014
Tools and Techniques for Efficient High-Level System Design on FPGAs.
CoRR, 2014

2013
Efficient floating-point polynomial evaluation on FPGAS.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Faithful single-precision floating-point tangent for FPGAs.
Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

Elementary Function Implementation with Optimized Sub Range Polynomial Evaluation.
Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013

2011
Teraflop FPGA Design.
Proceedings of the 20th IEEE Symposium on Computer Arithmetic, 2011

2010
Multiplier architectures for FPGA double precision functions (abstract only).
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

2009
Cholesky decomposition using fused datapath synthesis.
Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

FPGA Floating Point Datapath Compiler.
Proceedings of the FCCM 2009, 2009

2008
Performance potential of molecular dynamics simulations on high performance reconfigurable computing systems.
Proceedings of the 2008 Second International Workshop on High-Performance Reconfigurable Computing Technology and Applications, 2008

Floating point datapath synthesis for FPGAs.
Proceedings of the FPL 2008, 2008

High performance matrix multiply using fused datapath operators.
Proceedings of the 42nd Asilomar Conference on Signals, Systems and Computers, 2008


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