Martin Keim
Orcid: 0000-0002-0029-135X
According to our database1,
Martin Keim
authored at least 54 papers
between 1994 and 2024.
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Bibliography
2024
IEEE Std P3405: New Standard-under-Development for Chiplet Interconnect Test and Repair.
Proceedings of the 42nd IEEE VLSI Test Symposium, 2024
Proceedings of the 42nd IEEE VLSI Test Symposium, 2024
Proceedings of the IEEE European Test Symposium, 2024
Proceedings of the IEEE European Test Symposium, 2024
Proceedings of the IEEE European Test Symposium, 2024
New Standard-under-Development for Chiplet Interconnect Test and Repair: IEEE Std P3405.
Proceedings of the IEEE European Test Symposium, 2024
2023
Proceedings of the IEEE International Test Conference, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
IEEE Des. Test, 2022
Proceedings of the 40th IEEE VLSI Test Symposium, 2022
Proceedings of the IEEE International Test Conference, 2022
2021
Proceedings of the 26th IEEE European Test Symposium, 2021
Proceedings of the 26th IEEE European Test Symposium, 2021
Proceedings of the 26th IEEE European Test Symposium, 2021
2020
Proceedings of the IEEE International Test Conference, 2020
Fast Bring-Up of an AI SoC through IEEE 1687 Integrating Embedded TAPs and IEEE 1500 Interfaces.
Proceedings of the IEEE International Test Conference, 2020
Proceedings of the IEEE International Test Conference, 2020
Proceedings of the IEEE International Test Conference, 2020
Proceedings of the IEEE European Test Symposium, 2020
Proceedings of the IEEE European Test Symposium, 2020
2018
Proceedings of the 36th IEEE VLSI Test Symposium, 2018
Implementing Design-for-Test Within a Tile-Based Design Methodology - Challenges and Solutions.
Proceedings of the IEEE International Test Conference in Asia, 2018
2017
Computer, 2017
Proceedings of the International Test Conference in Asia, 2017
2015
A case study: Leverage IEEE 1687 based method to automate modeling, verification, and test access for embedded instruments in a server processor.
Proceedings of the 2015 IEEE International Test Conference, 2015
2014
Quo Vadis DFT?
Proceedings of the Aspekte der Technischen Informatik, 2014
2013
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
2012
Proceedings of the 17th IEEE European Test Symposium, 2012
2008
Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008
Efficiently Performing Yield Enhancements by Identifying Dominant Physical Root Cause from Test Fail Data.
Proceedings of the 2008 IEEE International Test Conference, 2008
Extraction, Simulation and Test Generation for Interconnect Open Defects Based on Enhanced Aggressor-Victim Model.
Proceedings of the 2008 IEEE International Test Conference, 2008
2007
Proceedings of the 25th IEEE VLSI Test Symposium (VTS 2007), 2007
Proceedings of the 12th European Test Symposium, 2007
Proceedings of the 16th Asian Test Symposium, 2007
2006
Proceedings of the 2006 IEEE International Test Conference, 2006
2004
Affordable and Effective Screening of Delay Defects in ASICs using the Inline Resistance Fault Model.
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004
2003
2002
Proceedings of the 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 2002
2001
J. Electron. Test., 2001
2000
Proceedings of the 5th European Test Workshop, 2000
1999
J. Electron. Test., 1999
Proceedings of the 4th European Test Workshop, 1999
Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999
1998
Test Generation for (Sequential) Multi-Valued Logic Networks based on Genetic Algorithm.
Proceedings of the 28th IEEE International Symposium on Multiple-Valued Logic, 1998
1997
On Optimizing BIST-Architecture by Using OBDD-based Approaches and Genetic Algorithms.
Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997
Proceedings of the 27th IEEE International Symposium on Multiple-Valued Logic, 1997
Sympathy-MV: Fast Exact Minimization of Fixed Polarity Multi-Valued Linear Expressions.
Proceedings of the 27th IEEE International Symposium on Multiple-Valued Logic, 1997
1996
Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996
1995
Symbolic Fault Simulation for Sequential Circuits and the Multiple Observation Time Test Strategy.
Proceedings of the 32st Conference on Design Automation, 1995
1994
Proceedings of the Proceedings IEEE International Test Conference 1994, 1994