Martin Ferianc

Orcid: 0000-0002-4031-6398

According to our database1, Martin Ferianc authored at least 29 papers between 2018 and 2024.

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Bibliography

2024
Navigating Noise: A Study of How Noise Influences Generalisation and Calibration of Neural Networks.
Trans. Mach. Learn. Res., 2024

Enhancing Dropout-based Bayesian Neural Networks with Multi-Exit on FPGA.
CoRR, 2024

Large language models surpass human experts in predicting neuroscience results.
CoRR, 2024

SAE: Single Architecture Ensemble Neural Networks.
CoRR, 2024

YAMLE: Yet Another Machine Learning Environment.
CoRR, 2024

2023
Cultural Alignment in Large Language Models: An Explanatory Analysis Based on Hofstede's Cultural Dimensions.
CoRR, 2023

Impact of Noise on Calibration and Generalisation of Neural Networks.
CoRR, 2023

Renate: A Library for Real-World Continual Learning.
CoRR, 2023

An Online Learning Method for Microgrid Energy Management Control<sup>*</sup>.
Proceedings of the 31st Mediterranean Conference on Control and Automatio, 2023

MIMMO: Multi-Input Massive Multi-Output Neural Network.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2023

Satellite-based InSAR Geodesy and Collocation with GNSS.
Proceedings of the CENTERIS 2023 - International Conference on ENTERprise Information Systems / ProjMAN - International Conference on Project MANagement / HCist, 2023

2022
Accelerating Bayesian Neural Networks via Algorithmic and Hardware Optimizations.
IEEE Trans. Parallel Distributed Syst., 2022

Toward Full-Stack Acceleration of Deep Convolutional Neural Networks on FPGAs.
IEEE Trans. Neural Networks Learn. Syst., 2022

FPGA-Based Acceleration for Bayesian Convolutional Neural Networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Simple Regularisation for Uncertainty-Aware Knowledge Distillation.
CoRR, 2022

Enabling fast uncertainty estimation: accelerating bayesian transformers via algorithmic and hardware optimizations.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

Algorithm and Hardware Co-design for Reconfigurable CNN Accelerator.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021
On Causal Inference for Data-free Structured Pruning.
CoRR, 2021

High-Performance FPGA-based Accelerator for Bayesian Recurrent Neural Networks.
CoRR, 2021

On the effects of quantisation on model uncertainty in Bayesian neural networks.
Proceedings of the Thirty-Seventh Conference on Uncertainty in Artificial Intelligence, 2021

ComBiNet: Compact Convolutional Bayesian Neural Network for Image Segmentation.
Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2021, 2021

Optimizing Bayesian Recurrent Neural Networks on an FPGA-based Accelerator.
Proceedings of the International Conference on Field-Programmable Technology, 2021

High-Performance FPGA-based Accelerator for Bayesian Neural Networks.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
VINNAS: Variational Inference-based Neural Network Architecture Search.
CoRR, 2020

Optimizing FPGA-Based CNN Accelerator Using Differentiable Neural Architecture Search.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020

Improving Performance Estimation for FPGA-Based Accelerators for Convolutional Neural Networks.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2020

2019
Static Block Floating-Point Quantization for Convolutional Neural Networks on FPGA.
Proceedings of the International Conference on Field-Programmable Technology, 2019

F-E3D: FPGA-based Acceleration of an Efficient 3D Convolutional Neural Network for Human Action Recognition.
Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

2018
A Real-Time Object Detection Accelerator with Compressed SSDLite on FPGA.
Proceedings of the International Conference on Field-Programmable Technology, 2018


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