Martha Johanna Sepúlveda

Orcid: 0000-0003-3686-994X

Affiliations:
  • Airbus Defense and Space GmbH, Germany
  • Technical University of Munich, Chair of Security in Information Technology, Germany
  • University of São Paulo


According to our database1, Martha Johanna Sepúlveda authored at least 97 papers between 2010 and 2023.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2023
A practical study of post-quantum enhanced identity-based encryption.
Microprocess. Microsystems, June, 2023

A PQC and QKD Hybridization for Quantum-Secure Communications.
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

2022
Super Acceleration of Dilithium in MPSoCs Critical Environments.
Proceedings of the IEEE European Test Symposium, 2022

Hybrid Post-Quantum Enhanced TLS 1.3 on Embedded Devices.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

2021
Post-quantum cryptography for automotive systems.
Microprocess. Microsystems, November, 2021

Subutai: Speeding Up Legacy Parallel Applications Through Data Synchronization.
IEEE Trans. Parallel Distributed Syst., 2021

Beyond Cache Attacks: Exploiting the Bus-based Communication Structure for Powerful On-Chip Microarchitectural Attacks.
ACM Trans. Embed. Comput. Syst., 2021

Post-Quantum Cryptography in MPSoC Environments.
Proceedings of the 29th IFIP/IEEE International Conference on Very Large Scale Integration, 2021

LightRoAD: Lightweight Rowhammer Attack Detector.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021

Lightweight Monitoring Scheme for Flooding DoS Attack Detection in Multi-Tenant MPSoCs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Towards Post-Quantum Enhanced Identity-Based Encryption.
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

Revealing the Secrets of Spiking Neural Networks: The Case of Izhikevich Neuron.
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

GRINCH: A Cache Attack against GIFT Lightweight Cipher.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Invited: Security Beyond Bulk Silicon: Opportunities and Challenges of Emerging Devices.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
Using Smart Routing for Secure and Dependable NoC-Based MPSoCs.
IEEE/ACM Trans. Netw., 2020

RISQ-V: Tightly Coupled RISC-V Accelerators for Post-Quantum Cryptography.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2020

Guard-NoC: A Protection Against Side-Channel Attacks for MPSoCs.
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

LiD-CAT: A Lightweight Detector for Cache ATtacks.
Proceedings of the IEEE European Test Symposium, 2020

Strengthening Post-Quantum Security for Automotive Systems.
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

Extending the RISC-V Instruction Set for Hardware Acceleration of the Post-Quantum Scheme LAC.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
Cache timing attacks on NoC-based MPSoCs.
Microprocess. Microsystems, 2019

Side-channel protected MPSoC through secure real-time networks-on-chip.
Microprocess. Microsystems, 2019

Design and Multi-Abstraction-Level Evaluation of a NoC Router for Mixed-Criticality Real-Time Systems.
ACM J. Emerg. Technol. Comput. Syst., 2019

Towards memory integrity and authenticity of multi-processors system-on-chip using physical unclonable functions.
it Inf. Technol., 2019

The Influence of LWE/RLWE Parameters on the Stochastic Dependence of Decryption Failures.
IACR Cryptol. ePrint Arch., 2019

Post-Quantum Enabled Cyber Physical Systems.
IEEE Embed. Syst. Lett., 2019

Security Aspects of Real-Time MPSoCs: The Flaws and Opportunities of Preemptive NoCs.
Proceedings of the VLSI-SoC: New Technology Enabler, 2019

Attacking Real-time MPSoCs: Preemptive NoCs are Vulnerable.
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

Detecting and Mitigating Low-and-Slow DoS Attacks in NoC-based MPSoCs.
Proceedings of the 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2019

CAESAR-MPSoC: Dynamic and Efficient MPSoC Security Zones.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

Dynamic and Distributed Security Management for NoC Based MPSoCs.
Proceedings of the Computational Science - ICCS 2019, 2019

Efficient and Flexible Low-Power NTT for Lattice-Based Cryptography.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2019

Design and Verification of Secure Cache Wrapper Against Access-Driven Side-Channel Attacks.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

Towards Reliable and Secure Post-Quantum Co-Processors based on RISC-V.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Practical Evaluation of Masking for NTRUEncrypt on ARM Cortex-M4.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2019

2018
Networked Power-Gated MRAMs for Memory-Based Computing.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Analysis of Error-Correcting Codes for Lattice-Based Key Exchange.
IACR Cryptol. ePrint Arch., 2018

Efficient Hardware/Software Co-design for NTRU.
Proceedings of the VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms, 2018

Secure and Compact Full NTRU Hardware Implementation.
Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018

Understanding MPSoCs: exploiting memory microarchitectural vulnerabilities of high performance NoC-based MPSoCs.
Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

Session details: Security threats caused by novel technologies.
Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

A Distributed DoS Detection Scheme for NoC-based MPSoCs.
Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018

Enabling Secure MPSoC Dynamic Operation through Protected Communication.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Security aspects of neuromorphic MPSoCs.
Proceedings of the International Conference on Computer-Aided Design, 2018

SEPUFSoC: Using PUFs for Memory Integrity and Authentication in Multi-Processors System-on-Chip.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

Towards the formal verification of security properties of a Network-on-Chip router.
Proceedings of the 23rd IEEE European Test Symposium, 2018

Earthquake - A NoC-based optimized differential cache-collision attack for MPSoCs.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Subutai: distributed synchronization primitives in NoC interfaces for legacy parallel-applications.
Proceedings of the 55th Annual Design Automation Conference, 2018

2017
Sensing as a Service: Secure Wireless Sensor Network Infrastructure Sharing for the Internet of Things.
Open J. Internet Things, 2017

Efficient security zones implementation through hierarchical group key management at NoC-based MPSoCs.
Microprocess. Microsystems, 2017

Timing attack on NoC-based systems: Prime+Probe attack and NoC-based protection.
Microprocess. Microsystems, 2017

Energy-Efficiency Comparison of Multi-Layer Deposited Nanophotonic Crossbar Interconnects.
ACM J. Emerg. Technol. Comput. Syst., 2017

Cache attacks and countermeasures for NTRUEncrypt on MPSoCs: Post-quantum resistance for the IoT.
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017

T1B: Special session: Data analytics driven design for yield, manufacturability and reliability: Where machine learning meets design automation.
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017

Introduction to hardware-oriented security for MPSoCs.
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017

BlooXY: On a non-invasive blood monitor for the IoT context.
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017

A security-aware routing implementation for dynamic data protection in zone-based MPSoC.
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

Towards trace-driven cache attacks on Systems-on-Chips - exploiting bus communication.
Proceedings of the 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2017

Side-channel attack resilience through route randomisation in secure real-time Networks-on-Chip.
Proceedings of the 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2017

NoC-MRAM architecture for memory-based computing: Database-search case study.
Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017

Exploiting Bus Communication to Improve Cache Attacks on Systems-on-Chips.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

DAS: An Efficient NoC Router for Mixed-Criticality Real-Time Systems.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Towards Protected MPSoC Communication for Information Protection against a Malicious NoC.
Proceedings of the International Conference on Computational Science, 2017

Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems (ALCHEMY): Preface.
Proceedings of the International Conference on Computational Science, 2017

Towards post-quantum security for IoT endpoints with NTRU.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
Protection of heterogeneous architectures on FPGAs: An approach based on hardware firewalls.
Microprocess. Microsystems, 2016

Side channel attack on NoC-based MPSoCs are practical: NoC Prime+Probe attack.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

A security aware routing approach for NoC-based MPSoCs.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

Towards risk aware NoCs for data protection in MPSoCs.
Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2016

Network Contention-Aware Method to Evaluate Data Coherency Protocols within a Compilation Toolchain.
Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016

Dynamic NoC buffer allocation for MPSoC timing side channel attack protection.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

Gossip NoC - Avoiding Timing Side-Channel Attacks through Traffic Management.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

A Fast Evaluation Approach of Data Consistency Protocols within a Compilation Toolchain.
Proceedings of the International Conference on Computational Science 2016, 2016

Notifying memories: a case-study on data-flow applications with NoC interfaces implementation.
Proceedings of the 53rd Annual Design Automation Conference, 2016

2015
NoC-Based Protection for SoC Time-Driven Attacks.
IEEE Embed. Syst. Lett., 2015

Reconfigurable Group-Wise Security Architecture for NoC-Based MPSoCs Protection.
Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015

PHiCIT: Improving Hierarchical Networks-on-chip through 3D Silicon Photonics Integration.
Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015

Reconfigurable security architecture for disrupted protection zones in NoC-based MPSoCs.
Proceedings of the 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2015

Efficient and flexible NoC-based group communication for secure MPSoCs.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

Communication Aware Design Method for Optical Network-on-Chip.
Proceedings of the IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2015

TSV protection: Towards secure 3D-MPSoC.
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015

A non-intrusive and reconfigurable access control to secure NoCs.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

Automatic ILP-based Firewall Insertion for Secure Application-Specific Networks-on-Chip.
Proceedings of the Ninth International Workshop on Interconnection Network Architectures: On-Chip, 2015

Cycle-based Model to Evaluate Consistency Protocols within a Multi-protocol Compilation Tool-chain.
Proceedings of the 2015 International Workshop on Code Optimisation for Multi and Many Cores, 2015

2014
3D-LeukoNoC: A dynamic NoC protection.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

Elastic security zones for NoC-based 3D-MPSoCs.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2013
An evolutive approach for designing thermal and performance-aware heterogeneous 3D-NoCs.
Proceedings of the 26th Symposium on Integrated Circuits and Systems Design, 2013

Security-enhanced 3D communication structure for dynamic 3D-MPSoCs protection.
Proceedings of the 26th Symposium on Integrated Circuits and Systems Design, 2013

QoS 3D-HoC hybrid-on-chip communication structure for dynamic 3D-MPSoCs.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013

3DMIA: a multi-objective artificial immune algorithm for 3D-MPSoC multi-application 3D-NoC mapping.
Proceedings of the Genetic and Evolutionary Computation Conference, 2013

Scalable NoC-based architecture of neural coding for new efficient associative memories.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2013

2012
QoSS Hierarchical NoC-Based Architecture for MPSoC Dynamic Protection.
Int. J. Reconfigurable Comput., 2012

Hybrid-on-chip communication architecture for dynamic MP-SoC protection.
Proceedings of the 25th Symposium on Integrated Circuits and Systems Design, 2012

Multi-objective artificial immune algorithm for security-constrained multi-application NoC mapping.
Proceedings of the Genetic and Evolutionary Computation Conference, 2012

2011
Dynamic NoC-based architecture for MPSoC security implementation.
Proceedings of the 24th Symposium on Integrated Circuits and Systems Design, 2011

2010
Implementation of QoSS (Quality-of-Security Service) for NoC-Based SoC Protection.
Trans. Comput. Sci., 2010

The LRD traffic impact on the NoC-based SoCs.
Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, 2010


  Loading...