Marta Portela-García
Orcid: 0000-0002-4103-0519Affiliations:
- Carlos III University of Madrid, Spain
According to our database1,
Marta Portela-García
authored at least 40 papers
between 2004 and 2024.
Collaborative distances:
Collaborative distances:
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Online presence:
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on zbmath.org
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on orcid.org
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Bibliography
2024
Performance Analysis of Postquantum Cryptographic Schemes for Securing Large-Scale Wireless Sensor Networks.
IEEE Trans. Ind. Informatics, October, 2024
2023
2021
Sensors, 2021
2020
Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020
2019
Proceedings of the XXXIV Conference on Design of Circuits and Integrated Systems, 2019
Proceedings of the XXXIV Conference on Design of Circuits and Integrated Systems, 2019
2018
Proceedings of the Conference on Design of Circuits and Integrated Systems, 2018
2017
A low-IF bandpass ΣΔ ADC for fully-integrated CMOS magnetic resonance imaging receivers.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017
2016
IEEE Trans. Computers, 2016
2014
Microelectron. J., 2014
Reducing SEU sensitivity in LIN networks: Selective and collaborative hardening techniques.
Proceedings of the 15th Latin American Test Workshop, 2014
Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014
Effect of ionizing radiation on TRNGs for safe telecommunications: Robustness and randomness.
Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014
Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014
2013
Hardening of serial communication protocols for potentially critical systems in automotive applications: LIN bus.
Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013
Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013
2012
Soft Error Sensitivity Evaluation of Microprocessors by Multilevel Emulation-Based Fault Injection.
IEEE Trans. Computers, 2012
On the use of embedded debug features for permanent and transient fault resilience in microprocessors.
Microprocess. Microsystems, 2012
Evaluating the Effectiveness of a Software-Based Technique Under SEEs Using FPGA-Based Fault Injection Approach.
J. Electron. Test., 2012
Proceedings of the 18th IEEE International On-Line Testing Symposium, 2012
2011
IEEE Trans. Dependable Secur. Comput., 2011
Using an FPGA-based fault injection technique to evaluate software robustness under SEEs: A case study.
Proceedings of the 12th Latin American Test Workshop, 2011
Evaluation techniques for on-line testing of robust systems based on critical tasks distribution.
Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011
2010
Proceedings of the 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 2010
2009
Proceedings of the 10th Latin American Test Workshop, 2009
Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009
Pseudo-random number generation applied to robust modern cryptography: A new technique for block ciphers.
Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009
Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009
2008
Smart Hardening for Round-based Encryption Algorithms: Application to Advanced Encryption Standard.
Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008
2007
A Rapid Fault Injection Approach for Measuring SEU Sensitivity in Complex Processors.
Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007
2006
A Fault Injection Environment for SoPC's Embedded Microprocessors.
Proceedings of the 7th Latin American Test Workshop, 2006
Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006
Proceedings of the 11th European Test Symposium, 2006
An Extension of Transient Fault Emulation Techniques to Circuits with Embedded Memories.
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006
2005
Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005
Proceedings of the 2005 Design, 2005
2004
Proceedings of the 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 2004