Markus Grozing
Orcid: 0000-0001-9870-3895
According to our database1,
Markus Grozing
authored at least 31 papers
between 2003 and 2024.
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Bibliography
2024
A Time-Interleaved Digital-to-Analog Converter up to 118 GS/s With Integrated Analog Multiplexer in 28-nm FD-SOI CMOS Technology.
IEEE J. Solid State Circuits, March, 2024
467 Gbit/s Net Bitrate IM/DD Transmission Using 176 GBd PAM-8 Enabled by SiGe AMUX with Excellent Linearity.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2024
Characterization of an Analog MAC Cell with Multi-Bit Resolution for AI Inference Accelerators.
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024
Characterization of a Femtojoule Voltage-to-Time Converter with Rectified Linear Unit Characteristic for Analog Neural Network Inference Accelerators.
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024
2023
Digital Time-Domain Predistortion of Linear Periodically Time-Varying Effects and Its Application to a 100-GS/s Time-Interleaved CMOS DAC.
IEEE Trans. Circuits Syst. I Regul. Pap., December, 2023
Analog Multiply-Accumulate Cell With Multi-Bit Resolution for All-Analog AI Inference Accelerators.
IEEE Trans. Circuits Syst. I Regul. Pap., September, 2023
Switching Mode Power Amplifier for Fully Digital RF Transmitter at 3.6 GHz in 22 nm FD-SOI CMOS.
Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023
2022
Time-Interleaved Switched Emitter Followers to Extend Front-End Sampling Rates to up to 200 GS/s.
IEEE J. Solid State Circuits, 2022
Design of an Energy Efficient Analog Two-Quadrant Multiplier Cell Operating in Weak Inversion.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022
Design of an Energy Efficient Voltage-to-Time Converter with Rectified Linear Unit Characteristics for Artificial Neural Networks.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022
Mixed-Signal Integrated Circuit for Direct Raised-Cosine Filter Waveform Synthesis of Digital Signals up to 24 GS/s in 22 nm FD-SOI CMOS Technology.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Integrating Ultra-thin SiGe BiCMOS Power Amplifier Chip in Combination with Flexible Antenna in the Polymer Foil.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2021
1-to-4 Analog Demultiplexer With up to 128 GS/s for Interleaving of Bandwidth-Limited Digitizers in Wireline and Optical Receivers.
IEEE J. Solid State Circuits, 2021
64-GS/s 6-Bit Track-and-Hold Circuit with More Than 61 GHz Bandwidth at 1.0 Vpp Input Voltage Swing in 90-nm SiGe BiCMOS Technology.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the European Conference on Optical Communication, 2021
Analog Demultiplexer Operating at up to 200 GS/s Using Four Time Interleaved Switched Emitter Followers with a 50% Duty Cycle Clock.
Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2021
Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2021
2020
32-GS/s SiGe Track-and-Hold Amplifier with 58-GHz Bandwidth and -64-dBc to -29-dBc HD3.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
128-GS/s 1-to-4 SiGe Analog Demultiplexer with 36-GHz Bandwidth for 6-bit Data Converters.
Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2020
2019
A SiGe HBT BiCMOS 1-to-4 ADC Frontend Supporting 100 GBaud PAM4 Reception at 14 GHz Digitizer Bandwidth.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2019
2018
Integr., 2018
Proceedings of the 14th Conference on Ph.D. Research in Microelectronics and Electronics, 2018
Proceedings of the 14th Conference on Ph.D. Research in Microelectronics and Electronics, 2018
Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
An Adaptable 6.4 - 32 GS/s Track-and-Hold Amplifier with Track-Mode Masking for High Signal Power Applications in 55 nm SiGe-BiCMOS.
Proceedings of the 2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2018
A 25.6-GS/s 40-GHz 1-dB BW Current-Mode Track and Hold Circuit with more than 5-ENOB.
Proceedings of the 2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2018
2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2014
Design of a 4 GS/s radix-1.75 single channel pipeline ADC in 28 nm CMOS technology with foreground calibration.
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014
2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
2003
Proceedings of the ESSCIRC 2003, 2003