Marko Aleksic

According to our database1, Marko Aleksic authored at least 15 papers between 2001 and 2018.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2018
Non-physical Painting Restoration in Improved Reality.
Proceedings of the VR Technologies in Cultural Heritage - First International Conference, 2018

2015
A 40 Gb/s Serial Link Transceiver in 28 nm CMOS Technology.
IEEE J. Solid State Circuits, 2015

2014
A 3.2-GHz 1.3-mW ILO phase rotator for burst-mode mobile memory I/O in 28-nm low-leakage CMOS.
Proceedings of the ESSCIRC 2014, 2014

2010
A 4.3 GB/s Mobile Memory Interface With Power-Efficient Bandwidth Scaling.
IEEE J. Solid State Circuits, 2010

2009
Capacity of a Class of Modulo-Sum Relay Channels.
IEEE Trans. Inf. Theory, 2009

A 16 Gb/s/Link, 64 GB/s Bidirectional Asymmetric Memory Interface.
IEEE J. Solid State Circuits, 2009

2008
Jitter Analysis of Nonautonomous MOS Current-Mode Logic Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008

2006
A new CFA interpolation framework.
Signal Process., 2006

2005
A New Model for Timing Jitter Caused by Device Noise in Current-Mode Logic Frequency Dividers.
Proceedings of the Integrated Circuit and System Design, 2005

Coding for the blackwell channel: a survey propagation approach.
Proceedings of the 2005 IEEE International Symposium on Information Theory, 2005

2004
A novel cost effective demosaicing approach.
IEEE Trans. Consumer Electron., 2004

2002
Conditional pre-charge techniques for power-efficient dual-edge clocking.
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002

Comparative analysis of double-edge versus single-edge triggered clocked storage elements.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001
Conditional techniques for low power consumption flip-flops.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

Timing Characterization of Dual-edge Triggered Flip-flops.
Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001


  Loading...