Mark P. McCartney

According to our database, Mark P. McCartney authored at least 7 papers between 2008 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

A 4GHz 16nm SRAM Architecture with Low-Power Features for Heterogeneous Computing Platforms.

Cagla Cakir, Andy W. Chen, Y. K. Chong, Sriram Thyagarajan, Mark P. McCartney, Peixuan Tan, Yulin Shi, Mudit Bhargava

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

2014

SRAM Reliability Improvement Using ECC and Circuit Techniques.

Mark P. McCartney

PhD thesis, 2014

2013

Building Fast, Dense, Low-Power Caches Using Erasure-Based Inline Multi-bit ECC.

Jangwoo Kim, Hyunggyun Yang, Mark P. McCartney, Mudit Bhargava, Ken Mai, Babak Falsafi

Proceedings of the IEEE 19th Pacific Rim International Symposium on Dependable Computing, 2013

2011

FPGA-based nand flash memory error characterization and solid-state drive prototyping platform (abstract only).

Yu Cai, Erich F. Haratsch, Mark P. McCartney, Mudit Bhargava, Ken Mai

Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, 2011

FPGA-Based Solid-State Drive Prototyping Platform.

Yu Cai, Erich F. Haratsch, Mark P. McCartney, Ken Mai

Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

2009

Low-overhead, digital offset compensated, SRAM sense amplifiers.

Mudit Bhargava, Mark P. McCartney, Alexander Hoefler, Ken Mai

Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008

Variation-tolerant SRAM sense-amplifier timing using configurable replica bitlines.

Umut Arslan, Mark P. McCartney, Mudit Bhargava, Xin Li, Ken Mai, Lawrence T. Pileggi

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008