Mark Horowitz
Orcid: 0000-0003-3245-7542Affiliations:
- Stanford University, Department of Electrical Engineering, CA, USA
According to our database1,
Mark Horowitz
authored at least 255 papers
between 1983 and 2024.
Collaborative distances:
Collaborative distances:
Awards
ACM Fellow
ACM Fellow 2003, "For contributions to multiprocessor architecture.".
IEEE Fellow
IEEE Fellow 2000, "For contributions to the design of high-speed digital integrated circuits and systems".
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
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on orcid.org
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on id.loc.gov
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on dl.acm.org
On csauthors.net:
Bibliography
2024
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2024
Amber: A 16-nm System-on-Chip With a Coarse- Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra.
IEEE J. Solid State Circuits, March, 2024
Onyx: A 12nm 756 GOPS/W Coarse-Grained Reconfigurable Array for Accelerating Dense and Sparse Applications.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2024
Proceedings of the 36th IEEE Hot Chips Symposium, 2024
2023
ACM Trans. Reconfigurable Technol. Syst., June, 2023
Unified Buffer: Compiling Image Processing and Machine Learning Applications to Push-Memory Accelerators.
ACM Trans. Archit. Code Optim., June, 2023
AHA: An Agile Approach to the Design of Coarse-Grained Reconfigurable Accelerators and Compilers.
ACM Trans. Embed. Comput. Syst., March, 2023
Soc. Netw. Anal. Min., 2023
Retrospective: EIE: Efficient Inference Engine on Sparse and Compressed Neural Network.
CoRR, 2023
Hardware Abstractions and Hardware Mechanisms to Support Multi-Task Execution on Coarse-Grained Reconfigurable Arrays.
CoRR, 2023
IEEE Comput. Archit. Lett., 2023
APEX: A Framework for Automated Processing Element Design Space Exploration using Frequent Subgraph Analysis.
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023
2022
A Fast Large-Integer Extended GCD Algorithm and Hardware Design for Verifiable Delay Functions and Modular Inversion.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022
An Open-Source Framework for FPGA Emulation of Analog/Mixed-Signal Integrated Circuit Designs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Enabling and Accelerating Dynamic Vision Transformer Inference for Real-Time Applications.
CoRR, 2022
Amber: A 367 GOPS, 538 GOPS/W 16nm SoC with a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Amber: Coarse-Grained Reconfigurable Array-Based SoC for Dense Linear Algebra Acceleration.
Proceedings of the 2022 IEEE Hot Chips 34 Symposium, 2022
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
mflowgen: a modular flow generator and ecosystem for community-driven physical design: invited.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
2021
IACR Cryptol. ePrint Arch., 2021
Automated Design Space Exploration of CGRA Processing Element Architectures using Frequent Subgraph Analysis.
CoRR, 2021
Proceedings of the Formal Methods in Computer Aided Design, 2021
2020
Open-Source Synthesizable Analog Blocks for High-Speed Link Designs: 20-GS/s 5b ENOB Analog-to-Digital Converter and 5-GHz Phase Interpolator.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
Proceedings of the International Conference for High Performance Computing, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
fault: A Python Embedded Domain-Specific Language for Metaprogramming Portable Hardware Verification Components.
Proceedings of the Computer Aided Verification - 32nd International Conference, 2020
Proceedings of the ASPLOS '20: Architectural Support for Programming Languages and Operating Systems, 2020
2019
An Analog Model Template Library: Simplifying Chip-Level, Mixed-Signal Design Verification.
IEEE Trans. Very Large Scale Integr. Syst., 2019
StartupBR: Higher Education's Influence on Social Networks and Entrepreneurship in Brazil.
CoRR, 2019
Proceedings of the 16th IEEE International Conference on Mobile Ad Hoc and Sensor Systems, 2019
Dataset Culling: Towards Efficient Training of Distillation-Based Domain Specific Models.
Proceedings of the 2019 IEEE International Conference on Image Processing, 2019
Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, 2019
2018
Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 978-3-031-01758-2, 2018
Mapping Histological Slice Sequences to the Allen Mouse Brain Atlas Without 3D Reconstruction.
Frontiers Neuroinformatics, 2018
Proceedings of the 2018 IEEE/ACM Third International Conference on Internet-of-Things Design and Implementation, 2018
Proceedings of the International Conference on Computer-Aided Design, 2018
2017
IEEE Trans. Image Process., 2017
ACM Trans. Archit. Code Optim., 2017
IEEE Des. Test, 2017
Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems, 2017
2016
Error Control and Limit Cycle Elimination in Event-Driven Piecewise Linear Analog Functional Models.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
IEEE J. Sel. Top. Signal Process., 2016
FPMax: a 106GFLOPS/W at 217GFLOPS/mm2 Single-Precision FPU, and a 43.7GFLOPS/W at 74.6GFLOPS/mm2 Double-Precision FPU, in 28nm UTBB FDSOI.
CoRR, 2016
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016
Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016
Deep compression and EIE: Efficient inference engine on compressed deep neural network.
Proceedings of the 2016 IEEE Hot Chips 28 Symposium (HCS), 2016
Proceedings of the International Conference on Embedded Wireless Systems and Networks, 2016
2015
Commun. ACM, 2015
Proceedings of the 13th ACM Conference on Embedded Networked Sensor Systems, 2015
Proceedings of the 2015 IEEE International Conference on Image Processing, 2015
2014
ACM Trans. Graph., 2014
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
2013
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013
Forwarding metamorphosis: fast programmable match-action processing in hardware for SDN.
Proceedings of the ACM SIGCOMM 2013 Conference, 2013
Proceedings of the 40th Annual International Symposium on Computer Architecture, 2013
Proceedings of the 21st IEEE Symposium on Computer Arithmetic, 2013
Proceedings of the Symposium on Architecture for Networking and Communications Systems, 2013
2012
IEEE J. Solid State Circuits, 2012
Commun. ACM, 2012
Proceedings of the Symposium on VLSI Circuits, 2012
Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012
Proceedings of the 39th International Symposium on Computer Architecture (ISCA 2012), 2012
Proceedings of the International Conference on Supercomputing, 2012
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Proceedings of the 23rd IEEE International Conference on Application-Specific Systems, 2012
2011
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
Proceedings of the 48th Design Automation Conference, 2011
Proceedings of the 48th Design Automation Conference, 2011
Proceedings of the 20th IEEE Symposium on Computer Arithmetic, 2011
2010
Fast, Non-Monte-Carlo Estimation of Transient Performance Variation Due to Device Mismatch.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010
Energy-performance tradeoffs in processor architecture and circuit design: a marginal cost analysis.
Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010
Proceedings of the Design, Automation and Test in Europe, 2010
An integrated framework for joint design space exploration of microarchitecture and circuits.
Proceedings of the Design, Automation and Test in Europe, 2010
An efficient test vector generation for checking analog/mixed-signal functional models.
Proceedings of the 47th Design Automation Conference, 2010
Proceedings of the 47th Design Automation Conference, 2010
2009
Area-efficiency in CMP core design: co-optimization of microarchitecture and physical design.
SIGARCH Comput. Archit. News, 2009
J. Informetrics, 2009
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009
Proceedings of the 36th International Symposium on Computer Architecture (ISCA 2009), 2009
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009
Proceedings of the 46th Design Automation Conference, 2009
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009
2008
ACM Trans. Archit. Code Optim., 2008
IEEE J. Solid State Circuits, 2008
IEEE J. Solid State Circuits, 2008
IEEE J. Solid State Circuits, 2008
Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2008
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
Proceedings of the 2008 ACM SIGPLAN workshop on Memory Systems Performance and Correctness: held in conjunction with the Thirteenth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS '08), 2008
2007
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), 2007
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007
Proceedings of IEEE International Conference on Communications, 2007
A new technique for characterization of digital-to-analog converters in high-speed systems.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Proceedings of the 44th Design Automation Conference, 2007
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007
Proceedings of the 18th IEEE Symposium on Computer Arithmetic (ARITH-18 2007), 2007
2006
IEEE J. Solid State Circuits, 2006
IEEE J. Solid State Circuits, 2006
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
Proceedings of the Global Telecommunications Conference, 2006. GLOBECOM '06, San Francisco, CA, USA, 27 November, 2006
2005
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005
On task mapping optimization for parallel decoding of low-density parity-check codes on message-passing architectures.
Parallel Comput., 2005
Autonomous dual-mode (PAM2/4) serial link transceiver with adaptive equalization and data recovery.
IEEE J. Solid State Circuits, 2005
Architecture and circuit techniques for a 1.1-GHz 16-kb reconfigurable memory in 0.18-μm CMOS.
IEEE J. Solid State Circuits, 2005
A 20-Gb/s 0.13-μm CMOS serial link transmitter using an LC-PLL to directly drive the output multiplexer.
IEEE J. Solid State Circuits, 2005
Circuits and techniques for high-resolution measurement of on-chip power supply noise.
IEEE J. Solid State Circuits, 2005
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005
Proceedings of the 31st European Solid-State Circuits Conference, 2005
Synthetic Aperture Focusing using a Shear-Warp Factorization of the Viewing Transform.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2005
2004
Optimal linear precoding with theoretical and practical data rates in high-speed serial-link backplane communication.
Proceedings of IEEE International Conference on Communications, 2004
Proceedings of the Global Telecommunications Conference, 2004. GLOBECOM '04, Dallas, Texas, USA, 29 November, 2004
Proceedings of the Global Telecommunications Conference, 2004. GLOBECOM '04, Dallas, Texas, USA, 29 November, 2004
Proceedings of the 2004 IEEE Computer Society Conference on Computer Vision and Pattern Recognition (CVPR 2004), with CD-ROM, 27 June, 2004
Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques (PACT 2004), 29 September, 2004
2003
IEEE Trans. Circuits Syst. II Express Briefs, 2003
Equalization and clock recovery for a 2.5-10-Gb/s 2-PAM/4-PAM backplane transceiver cell.
IEEE J. Solid State Circuits, 2003
IEEE J. Solid State Circuits, 2003
IEEE J. Solid State Circuits, 2003
Proceedings of the 2003 IEEE Symposium on Security and Privacy (S&P 2003), 2003
Proceedings of the 19th ACM Symposium on Operating Systems Principles 2003, 2003
Proceedings of the ACM SIGCOMM 2003 Conference on Applications, 2003
Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
Design of a 10GHz clock distribution network using coupled standing-wave oscillators.
Proceedings of the 40th Design Automation Conference, 2003
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003
2002
IEEE J. Solid State Circuits, 2002
IEEE J. Solid State Circuits, 2002
IEEE J. Solid State Circuits, 2002
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002
Transmit pre-emphasis for high-speed time-division-multiplexed serial-link transceiver.
Proceedings of the IEEE International Conference on Communications, 2002
2001
A serial-link transceiver based on 8-GSamples/s A/D and D/A converters in 0.25-μm CMOS.
IEEE J. Solid State Circuits, 2001
Optimizing the Mapping of Low-Density Parity Check Codes on Parallel Decoding Architectures.
Proceedings of the 2001 International Symposium on Information Technology (ITCC 2001), 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Optimizing iterative decoding of low-density parity check codes on programmable pipelined parallel architectures.
Proceedings of the Global Telecommunications Conference, 2001
Proceedings of the 38th Design Automation Conference, 2001
2000
A 2.4 Gb/s/pin simultaneous bidirectional parallel link with per-pin skew compensation.
IEEE J. Solid State Circuits, 2000
IEEE J. Solid State Circuits, 2000
IEEE J. Solid State Circuits, 2000
Proceedings of the 27th International Symposium on Computer Architecture (ISCA 2000), 2000
Proceedings of the Intelligent Memory Systems, Second International Workshop, 2000
Proceedings of the 37th Conference on Design Automation, 2000
Proceedings of the ASPLOS-IX Proceedings of the 9th International Conference on Architectural Support for Programming Languages and Operating Systems, 2000
1999
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
IEEE J. Solid State Circuits, 1999
IEEE J. Solid State Circuits, 1999
IEEE J. Solid State Circuits, 1999
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999
Using Partitioning to Help Convergence in the Standard-Cell Design Automation Methodology.
Proceedings of the 36th Conference on Design Automation, 1999
1998
Informing Memory Operations: Memory Performance Feedback Mechanisms and Their Applications.
ACM Trans. Comput. Syst., 1998
A 0.5-μm CMOS 4.0-Gbit/s serial link transceiver with data recovery using oversampling.
IEEE J. Solid State Circuits, 1998
IEEE J. Solid State Circuits, 1998
IEEE J. Solid State Circuits, 1998
IEEE J. Solid State Circuits, 1998
Proceedings of the 35th Conference on Design Automation, 1998
1997
IEEE J. Solid State Circuits, 1997
IEEE J. Solid State Circuits, 1997
IEEE J. Solid State Circuits, 1997
Proceedings of the 24th International Symposium on Computer Architecture, 1997
Proceedings of the 13th Symposium on Computer Arithmetic (ARITH-13 '97), 1997
1996
IEEE J. Solid State Circuits, 1996
IEEE J. Solid State Circuits, 1996
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996
Informing Memory Operations: Providing Memory Performance Feedback in Modern Processors.
Proceedings of the 23rd Annual International Symposium on Computer Architecture, 1996
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996
1995
IEEE J. Solid State Circuits, November, 1995
Proceedings of the 1995 International Symposium on Low Power Design 1995, 1995
Proceedings of the 22nd Annual International Symposium on Computer Architecture, 1995
Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI '95), 1995
1994
J. VLSI Signal Process., 1994
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994
Proceedings of the Proceedings IEEE International Test Conference 1994, 1994
Proceedings of the 21st Annual International Symposium on Computer Architecture. Chicago, 1994
Proceedings of the ASPLOS-VI Proceedings, 1994
Proceedings of the ASPLOS-VI Proceedings, 1994
Architectural and Implementation Tradeoffs in the Design of Multiple-Context Processors.
Proceedings of the Multithreaded Computer Architecture, 1994
1993
The design of a high-performance cache controller: a case study in asynchronous synthesis.
Integr., 1993
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993
1992
Architectural and implementation tradeoffs in the design of multiple-context processors.
Proceedings of the 19th Annual International Symposium on Computer Architecture. Gold Coast, 1992
Proceedings of the ASPLOS-V Proceedings, 1992
1991
Proceedings of the 18th Annual International Symposium on Computer Architecture. Toronto, 1991
A 160 ns 54 bit CMOS division implementation using self-timing and symmetrically overlapped SRT stages.
Proceedings of the 10th IEEE Symposium on Computer Arithmetic, 1991
1990
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990
Proceedings of the 17th Annual International Symposium on Computer Architecture, 1990
Proceedings of the Intellectual Leverage: Thirty-Fifth IEEE Computer Society International Conference, 1990
1989
IEEE J. Solid State Circuits, April, 1989
IEEE J. Solid State Circuits, April, 1989
Proceedings of the 16th Annual International Symposium on Computer Architecture. Jerusalem, 1989
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989
Proceedings of the ASPLOS-III Proceedings, 1989
Proceedings of the 9th Symposium on Computer Arithmetic, 1989
1988
ACM Trans. Comput. Syst., 1988
Proceedings of the 15th Annual International Symposium on Computer Architecture, 1988
Proceedings of the 15th Annual International Symposium on Computer Architecture, 1988
Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988
Proceedings of the 25th ACM/IEEE Conference on Design Automation, 1988
1987
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987
Proceedings of the 14th Annual International Symposium on Computer Architecture. Pittsburgh, 1987
Proceedings of the 24th ACM/IEEE Design Automation Conference. Miami Beach, FL, USA, June 28, 1987
Proceedings of the 24th ACM/IEEE Design Automation Conference. Miami Beach, FL, USA, June 28, 1987
1986
Proceedings of the 13th Annual Symposium on Computer Architecture, Tokyo, Japan, June 1986, 1986
1983
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1983
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1983