Mark D. Hickle

Orcid: 0000-0002-8212-6445

According to our database1, Mark D. Hickle authored at least 4 papers between 2016 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Single-Chip 30 GHz SiGe Sub-Sampling PLL with 28.3 fs Jitter.
Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2024

2021
A Single-Chip 25.3-28.0 GHz SiGe BiCMOS PLL with -134 dBc/Hz Phase Noise at 10 MHz Offset and -96 dBc Reference Spurs.
Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2021

2018
Theory and Design of Frequency-Tunable Absorptive Bandstop Filters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

2016
Synthesis, design, and fabrication techniques for reconfigurable microwave and millimeter-wave filters
PhD thesis, 2016


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