Mark B. Josephs
Orcid: 0000-0003-3379-9608
According to our database1,
Mark B. Josephs
authored at least 46 papers
between 1986 and 2021.
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Bibliography
2021
Intrusion Detection for Industrial Control Systems by Machine Learning using Privileged Information.
Proceedings of the IEEE International Conference on Intelligence and Security Informatics, 2021
Proceedings of the ARES 2021: The 16th International Conference on Availability, 2021
2020
User-Controlled, Auditable, Cross-Jurisdiction Sharing of Healthcare Data Mediated by a Public Blockchain.
Proceedings of the 19th IEEE International Conference on Trust, 2020
2019
Proceedings of the Smart Blockchain - Second International Conference, 2019
Proceedings of the 13th International Symposium on Medical Information and Communication Technology, 2019
A Research-Led Practice-Driven Digital Forensic Curriculum to Train Next Generation of Cyber Firefighters.
Proceedings of the IEEE Global Engineering Education Conference, 2019
Proceedings of the Risks and Security of Internet and Systems, 2019
2018
Cyber-Risks in the Industrial Internet of Things (IIoT): Towards a Method for Continuous Assessment.
Proceedings of the Information Security - 21st International Conference, 2018
Collective Responsibility and Mutual Coercion in IoT Botnets - A Tragedy of the Commons Problem.
Proceedings of the 15th International Joint Conference on e-Business and Telecommunications, 2018
Proceedings of the 12th European Conference on Software Architecture: Companion Proceedings, 2018
2007
Proceedings of the 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2007), 2007
2006
Verification and Implementation of Delay-Insensitive Processes in Restrictive Environments.
Fundam. Informaticae, 2006
Proceedings of the Sixth International Conference on Application of Concurrency to System Design (ACSD 2006), 2006
2005
Controllable Delay-Insensitive Processes and their Reflection, Interaction and Factorisation.
Proceedings of the Fifth International Conference on Application of Concurrency to System Design (ACSD 2005), 2005
2004
Modelling and verification of delay-insensitive circuits using CCS and the Concurrency Workbench.
Inf. Process. Lett., 2004
Decomposing specifications with concurrent outputs to resolve state coding conflicts in asynchronous logic synthesis.
Proceedings of the 41th Design Automation Conference, 2004
Proceedings of the Communicating Sequential Processes: The First 25 Years, 2004
2003
Proceedings of the 9th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2003), 2003
2002
Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002
Proceedings of the Concurrency and Hardware Design, Advances in Petri Nets, 2002
2000
Proceedings of the 2000 Design, 2000
1999
1998
Protocol Specification, Testing and Verification XV, by Piotr Dembinski and Marek Sredniawa (Editors), Chapman and Hall, 1996 (Book Review).
Softw. Test. Verification Reliab., 1998
Proceedings of the Mathematics of Program Construction, 1998
1997
Formal Aspects Comput., 1997
1996
IEEE Trans. Very Large Scale Integr. Syst., 1996
Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '96), 1996
1995
Proceedings of the Second Working Conference on Asynchronous Design Methodologies, 1995
Proceedings of the Second Working Conference on Asynchronous Design Methodologies, 1995
1994
Specifying Distributed CICS in Z: Accessing Local and Remote Resources (Short Communication).
Formal Aspects Comput., 1994
Formal design of an asynchronous DSP counterflow pipeline: a case study in handshake algebra.
Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems, 1994
1993
Implementing a Stack as a Delay-insensitive Circuit.
Proceedings of the Asynchronous Design Methodologies, Proceedings of the IFIP WG10.5 Working Conference on Asynchronous Design Methodologies, Manchester, UK, 31 March, 1993
Normal Form in a Delay-Insensitive Algebra.
Proceedings of the Asynchronous Design Methodologies, Proceedings of the IFIP WG10.5 Working Conference on Asynchronous Design Methodologies, Manchester, UK, 31 March, 1993
1992
High-Level Design of an Asynchronous Packet-Routing Chip.
Proceedings of the Designing Correct Circuits, 1992
1990
A Theory of Synchrony and Asynchrony.
Proceedings of the Programming concepts and methods: Proceedings of the IFIP Working Group 2.2, 1990
Proceedings of the CONCUR '90, 1990
Proceedings of the Computer Aided Verification, 2nd International Workshop, 1990
1989
1988
1986