Marius Bonaciu

According to our database1, Marius Bonaciu authored at least 7 papers between 2004 and 2008.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2008
Software for Multi Processor System on Chip: Moving an MPEG4 Decoder from Generic RISC Platforms to CELL.
Proceedings of the 19th IEEE/IFIP International Symposium on Rapid System Prototyping: RSP 2009, 2008

2007
Software Performance Estimation in MPSoC Design.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006
Flexible MPSoC platform with fast interconnect exploration for optimal system performance for a specific application.
Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, 2006

High-level architecture exploration for MPEG4 encoder with custom parameters.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005
Using abstract CPU subsystem simulation model for high level HW/SW architecture exploration.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004
An Efficient Architecture for the Implementation of Message Passing Programming Model on Massive Multiprocessor.
Proceedings of the 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 2004

An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory.
Proceedings of the 41th Design Automation Conference, 2004


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